Discussion:
[PATCH 4/4] davinci: da850 evm: register SATA device
(too old to reply)
Sekhar Nori
2011-03-23 11:32:29 UTC
Permalink
Register the platform device for SATA interface
present on the DA850/OMAP-L138/AM18x EVM.

Signed-off-by: Sekhar Nori <***@ti.com>
Cc: linux-***@vger.kernel.org
---
arch/arm/mach-davinci/board-da850-evm.c | 7 +++++++
1 files changed, 7 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c
index a7b41bf..3d2c0d7 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -1117,6 +1117,8 @@ static __init int da850_evm_init_cpufreq(void)
static __init int da850_evm_init_cpufreq(void) { return 0; }
#endif

+#define DA850EVM_SATA_REFCLKPN_RATE (100 * 1000 * 1000)
+
static __init void da850_evm_init(void)
{
int ret;
@@ -1237,6 +1239,11 @@ static __init void da850_evm_init(void)
if (ret)
pr_warning("da850_evm_init: spi 1 registration failed: %d\n",
ret);
+
+ ret = da850_register_sata(DA850EVM_SATA_REFCLKPN_RATE);
+ if (ret)
+ pr_warning("da850_evm_init: sata registration failed: %d\n",
+ ret);
}

#ifdef CONFIG_SERIAL_8250_CONSOLE
--
1.7.3.2

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Sekhar Nori
2011-03-23 11:32:28 UTC
Permalink
Add support for SATA controller on the
DA850/OMAP-L138/AM18x devices.

The patch adds the necessary clocks, platform
resources and a routine to initialize the SATA
controller.

The PHY configuration in this patch is
courtesy the work done by Zegeye Alemu,
Swaminathan and Mansoor Ahamed from TI.

While testing this patch, enable port multiplier
support iff you are actually using one. The
reasons of this behaviour are discussed
here: http://patchwork.ozlabs.org/patch/78163/

Signed-off-by: Sekhar Nori <***@ti.com>
Cc: linux-***@vger.kernel.org
---
arch/arm/mach-davinci/da850.c | 9 ++
arch/arm/mach-davinci/devices-da8xx.c | 138 ++++++++++++++++++++++++++++
arch/arm/mach-davinci/include/mach/da8xx.h | 3 +
3 files changed, 150 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 68fe4c2..276199d 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -373,6 +373,14 @@ static struct clk spi1_clk = {
.flags = DA850_CLK_ASYNC3,
};

+static struct clk sata_clk = {
+ .name = "sata",
+ .parent = &pll0_sysclk2,
+ .lpsc = DA850_LPSC1_SATA,
+ .gpsc = 1,
+ .flags = PSC_FORCE,
+};
+
static struct clk_lookup da850_clks[] = {
CLK(NULL, "ref", &ref_clk),
CLK(NULL, "pll0", &pll0_clk),
@@ -419,6 +427,7 @@ static struct clk_lookup da850_clks[] = {
CLK(NULL, "usb20", &usb20_clk),
CLK("spi_davinci.0", NULL, &spi0_clk),
CLK("spi_davinci.1", NULL, &spi1_clk),
+ CLK("ahci", NULL, &sata_clk),
CLK(NULL, NULL, NULL),
};

diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c
index 625d4b6..e061396 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -14,6 +14,8 @@
#include <linux/platform_device.h>
#include <linux/dma-mapping.h>
#include <linux/serial_8250.h>
+#include <linux/ahci_platform.h>
+#include <linux/clk.h>

#include <mach/cputype.h>
#include <mach/common.h>
@@ -834,3 +836,139 @@ int __init da8xx_register_spi(int instance, struct spi_board_info *info,

return platform_device_register(&da8xx_spi_device[instance]);
}
+
+static struct resource da850_sata_resources[] = {
+ {
+ .start = DA850_SATA_BASE,
+ .end = DA850_SATA_BASE + 0x1fff,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = IRQ_DA850_SATAINT,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+/* SATA PHY Control Register offset from AHCI base */
+#define SATA_P0PHYCR_REG 0x178
+
+#define SATA_PHY_MPY(x) ((x) << 0)
+#define SATA_PHY_LB(x) ((x) << 4)
+#define SATA_PHY_LOS(x) ((x) << 6)
+#define SATA_PHY_RXINVPAIR(x) ((x) << 7)
+#define SATA_PHY_RXTERM(x) ((x) << 8)
+#define SATA_PHY_RXCDR(x) ((x) << 10)
+#define SATA_PHY_RXEQ(x) ((x) << 13)
+#define SATA_PHY_TXINVPAIR(x) ((x) << 17)
+#define SATA_PHY_TXCM(x) ((x) << 18)
+#define SATA_PHY_TXSWING(x) ((x) << 19)
+#define SATA_PHY_TXDE(x) ((x) << 22)
+#define SATA_PHY_OVERRIDE(x) ((x) << 30)
+#define SATA_PHY_ENPLL(x) ((x) << 31)
+
+static struct clk *da850_sata_clk;
+static unsigned long da850_sata_refclkpn;
+
+/* Supported DA850 SATA crystal frequencies */
+#define KHZ_TO_HZ(freq) ((freq) * 1000)
+static unsigned long da850_sata_xtal[] = {
+ KHZ_TO_HZ(300000),
+ KHZ_TO_HZ(250000),
+ 0, /* Reserved */
+ KHZ_TO_HZ(187500),
+ KHZ_TO_HZ(150000),
+ KHZ_TO_HZ(125000),
+ KHZ_TO_HZ(120000),
+ KHZ_TO_HZ(100000),
+ KHZ_TO_HZ(75000),
+ KHZ_TO_HZ(60000),
+};
+
+static int da850_sata_init(struct device *dev, void __iomem *addr)
+{
+ int i, ret;
+ unsigned int val;
+
+ da850_sata_clk = clk_get(dev, NULL);
+ if (IS_ERR(da850_sata_clk))
+ return PTR_ERR(da850_sata_clk);
+
+ ret = clk_enable(da850_sata_clk);
+ if (ret)
+ goto err0;
+
+ /* Enable SATA clock receiver */
+ val = __raw_readl(DA8XX_SYSCFG1_VIRT(DA8XX_PWRDN_REG));
+ val &= ~BIT(0);
+ __raw_writel(val, DA8XX_SYSCFG1_VIRT(DA8XX_PWRDN_REG));
+
+ /* Get the multiplier needed for 1.5GHz PLL output */
+ for (i = 0; i < ARRAY_SIZE(da850_sata_xtal); i++) {
+ if (da850_sata_xtal[i] == da850_sata_refclkpn)
+ break;
+ }
+
+ if (i == ARRAY_SIZE(da850_sata_xtal)) {
+ ret = -EINVAL;
+ goto err1;
+ } else {
+ val = SATA_PHY_MPY(i + 1);
+ }
+
+ val |= SATA_PHY_LB(0) |
+ SATA_PHY_LOS(1) |
+ SATA_PHY_RXINVPAIR(0) |
+ SATA_PHY_RXTERM(0) |
+ SATA_PHY_RXCDR(4) |
+ SATA_PHY_RXEQ(1) |
+ SATA_PHY_TXINVPAIR(0) |
+ SATA_PHY_TXCM(0) |
+ SATA_PHY_TXSWING(3) |
+ SATA_PHY_TXDE(0) |
+ SATA_PHY_OVERRIDE(0) |
+ SATA_PHY_ENPLL(1);
+
+ __raw_writel(val, addr + SATA_P0PHYCR_REG);
+
+ return 0;
+
+err1:
+ clk_disable(da850_sata_clk);
+err0:
+ clk_put(da850_sata_clk);
+ return ret;
+}
+
+static void da850_sata_exit(struct device *dev)
+{
+ clk_disable(da850_sata_clk);
+ clk_put(da850_sata_clk);
+}
+
+static struct ahci_platform_data da850_sata_pdata = {
+ .init = da850_sata_init,
+ .exit = da850_sata_exit,
+};
+
+static u64 da850_sata_dmamask = DMA_BIT_MASK(32);
+
+static struct platform_device da850_sata_device = {
+ .name = "ahci",
+ .id = -1,
+ .dev = {
+ .platform_data = &da850_sata_pdata,
+ .dma_mask = &da850_sata_dmamask,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
+ },
+ .num_resources = ARRAY_SIZE(da850_sata_resources),
+ .resource = da850_sata_resources,
+};
+
+int __init da850_register_sata(unsigned long refclkpn)
+{
+ da850_sata_refclkpn = refclkpn;
+ if (!da850_sata_refclkpn)
+ return -EINVAL;
+
+ return platform_device_register(&da850_sata_device);
+}
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
index e4fc1af..aa6f08e 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -57,6 +57,7 @@ extern unsigned int da850_max_speed;
#define DA8XX_SYSCFG1_BASE (IO_PHYS + 0x22C000)
#define DA8XX_SYSCFG1_VIRT(x) (da8xx_syscfg1_base + (x))
#define DA8XX_DEEPSLEEP_REG 0x8
+#define DA8XX_PWRDN_REG 0x18

#define DA8XX_PSC0_BASE 0x01c10000
#define DA8XX_PLL0_BASE 0x01c11000
@@ -65,6 +66,7 @@ extern unsigned int da850_max_speed;
#define DA8XX_GPIO_BASE 0x01e26000
#define DA8XX_PSC1_BASE 0x01e27000
#define DA8XX_LCD_CNTRL_BASE 0x01e13000
+#define DA850_SATA_BASE 0x01e18000
#define DA8XX_PLL1_BASE 0x01e1a000
#define DA8XX_MMCSD0_BASE 0x01c40000
#define DA8XX_AEMIF_CS2_BASE 0x60000000
@@ -93,6 +95,7 @@ int da850_register_cpufreq(char *async_clk);
int da8xx_register_cpuidle(void);
void __iomem * __init da8xx_get_mem_ctlr(void);
int da850_register_pm(struct platform_device *pdev);
+int __init da850_register_sata(unsigned long refclkpn);

extern struct platform_device da8xx_serial_device;
extern struct emac_platform_data da8xx_emac_pdata;
--
1.7.3.2

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Sergei Shtylyov
2011-03-23 12:09:44 UTC
Permalink
Hello.
Post by Sekhar Nori
Add support for SATA controller on the
DA850/OMAP-L138/AM18x devices.
The patch adds the necessary clocks, platform
resources and a routine to initialize the SATA
controller.
The PHY configuration in this patch is
courtesy the work done by Zegeye Alemu,
Swaminathan and Mansoor Ahamed from TI.
While testing this patch, enable port multiplier
support iff you are actually using one. The
reasons of this behaviour are discussed
here: http://patchwork.ozlabs.org/patch/78163/
[...]
Post by Sekhar Nori
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 68fe4c2..276199d 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -373,6 +373,14 @@ static struct clk spi1_clk = {
.flags = DA850_CLK_ASYNC3,
};
+static struct clk sata_clk = {
+ .name = "sata",
+ .parent =&pll0_sysclk2,
+ .lpsc = DA850_LPSC1_SATA,
+ .gpsc = 1,
+ .flags = PSC_FORCE,
+};
+
static struct clk_lookup da850_clks[] = {
CLK(NULL, "ref", &ref_clk),
CLK(NULL, "pll0", &pll0_clk),
@@ -419,6 +427,7 @@ static struct clk_lookup da850_clks[] = {
CLK(NULL, "usb20", &usb20_clk),
CLK("spi_davinci.0", NULL, &spi0_clk),
CLK("spi_davinci.1", NULL, &spi1_clk),
+ CLK("ahci", NULL, &sata_clk),
CLK(NULL, NULL, NULL),
};
I'd put the above into a separate patch...
Post by Sekhar Nori
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c
index 625d4b6..e061396 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
[...]
Post by Sekhar Nori
@@ -834,3 +836,139 @@ int __init da8xx_register_spi(int instance, struct spi_board_info *info,
[...]
Post by Sekhar Nori
+/* Supported DA850 SATA crystal frequencies */
+#define KHZ_TO_HZ(freq) ((freq) * 1000)
+static unsigned long da850_sata_xtal[] = {
+ KHZ_TO_HZ(300000),
+ KHZ_TO_HZ(250000),
+ 0, /* Reserved */
Why reserve a place for it at all?
Post by Sekhar Nori
+ KHZ_TO_HZ(187500),
+ KHZ_TO_HZ(150000),
+ KHZ_TO_HZ(125000),
+ KHZ_TO_HZ(120000),
+ KHZ_TO_HZ(100000),
+ KHZ_TO_HZ(75000),
+ KHZ_TO_HZ(60000),
+};
+
+static int da850_sata_init(struct device *dev, void __iomem *addr)
+{
+ int i, ret;
+ unsigned int val;
+
+ da850_sata_clk = clk_get(dev, NULL);
+ if (IS_ERR(da850_sata_clk))
+ return PTR_ERR(da850_sata_clk);
+
+ ret = clk_enable(da850_sata_clk);
+ if (ret)
+ goto err0;
+
+ /* Enable SATA clock receiver */
+ val = __raw_readl(DA8XX_SYSCFG1_VIRT(DA8XX_PWRDN_REG));
+ val&= ~BIT(0);
+ __raw_writel(val, DA8XX_SYSCFG1_VIRT(DA8XX_PWRDN_REG));
+
+ /* Get the multiplier needed for 1.5GHz PLL output */
+ for (i = 0; i< ARRAY_SIZE(da850_sata_xtal); i++) {
+ if (da850_sata_xtal[i] == da850_sata_refclkpn)
+ break;
+ }
{} not needed.
Post by Sekhar Nori
+
+ if (i == ARRAY_SIZE(da850_sata_xtal)) {
+ ret = -EINVAL;
+ goto err1;
+ } else {
*else* not needed here, after *goto*.
Post by Sekhar Nori
+ val = SATA_PHY_MPY(i + 1);
+ }
+
[...]
Post by Sekhar Nori
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
index e4fc1af..aa6f08e 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
[...]
Post by Sekhar Nori
@@ -65,6 +66,7 @@ extern unsigned int da850_max_speed;
#define DA8XX_GPIO_BASE 0x01e26000
#define DA8XX_PSC1_BASE 0x01e27000
#define DA8XX_LCD_CNTRL_BASE 0x01e13000
+#define DA850_SATA_BASE 0x01e18000
It's used only in devices-da8xx.c -- shouldn't it be declared there?

WBR, Sergei
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Nori, Sekhar
2011-03-24 09:08:54 UTC
Permalink
Hi Sergei,
Post by Sergei Shtylyov
Post by Sekhar Nori
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 68fe4c2..276199d 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -373,6 +373,14 @@ static struct clk spi1_clk = {
.flags = DA850_CLK_ASYNC3,
};
+static struct clk sata_clk = {
+ .name = "sata",
+ .parent =&pll0_sysclk2,
+ .lpsc = DA850_LPSC1_SATA,
+ .gpsc = 1,
+ .flags = PSC_FORCE,
+};
+
static struct clk_lookup da850_clks[] = {
CLK(NULL, "ref", &ref_clk),
CLK(NULL, "pll0", &pll0_clk),
@@ -419,6 +427,7 @@ static struct clk_lookup da850_clks[] = {
CLK(NULL, "usb20", &usb20_clk),
CLK("spi_davinci.0", NULL, &spi0_clk),
CLK("spi_davinci.1", NULL, &spi1_clk),
+ CLK("ahci", NULL, &sata_clk),
CLK(NULL, NULL, NULL),
};
I'd put the above into a separate patch...
Why should addition of clock data not be in the same patch
as the one which adds platform resources etc? It is not a big
deal to change, but I would like to know why you request this.
Post by Sergei Shtylyov
Post by Sekhar Nori
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c
index 625d4b6..e061396 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
[...]
Post by Sekhar Nori
@@ -834,3 +836,139 @@ int __init da8xx_register_spi(int instance, struct spi_board_info *info,
[...]
Post by Sekhar Nori
+/* Supported DA850 SATA crystal frequencies */
+#define KHZ_TO_HZ(freq) ((freq) * 1000)
+static unsigned long da850_sata_xtal[] = {
+ KHZ_TO_HZ(300000),
+ KHZ_TO_HZ(250000),
+ 0, /* Reserved */
Why reserve a place for it at all?
Because then this table maps one-to-one to the hardware
defined table. This in turn keeps the init code pretty
simple. Plus, if and when hardware adds support for a
crystal there, the changes to rest of the code are minimal.
Post by Sergei Shtylyov
Post by Sekhar Nori
+ KHZ_TO_HZ(187500),
+ KHZ_TO_HZ(150000),
+ KHZ_TO_HZ(125000),
+ KHZ_TO_HZ(120000),
+ KHZ_TO_HZ(100000),
+ KHZ_TO_HZ(75000),
+ KHZ_TO_HZ(60000),
+};
+
+static int da850_sata_init(struct device *dev, void __iomem *addr)
+{
+ int i, ret;
+ unsigned int val;
+
+ da850_sata_clk = clk_get(dev, NULL);
+ if (IS_ERR(da850_sata_clk))
+ return PTR_ERR(da850_sata_clk);
+
+ ret = clk_enable(da850_sata_clk);
+ if (ret)
+ goto err0;
+
+ /* Enable SATA clock receiver */
+ val = __raw_readl(DA8XX_SYSCFG1_VIRT(DA8XX_PWRDN_REG));
+ val&= ~BIT(0);
+ __raw_writel(val, DA8XX_SYSCFG1_VIRT(DA8XX_PWRDN_REG));
+
+ /* Get the multiplier needed for 1.5GHz PLL output */
+ for (i = 0; i< ARRAY_SIZE(da850_sata_xtal); i++) {
+ if (da850_sata_xtal[i] == da850_sata_refclkpn)
+ break;
+ }
{} not needed.
Okay, will remove.
Post by Sergei Shtylyov
Post by Sekhar Nori
+
+ if (i == ARRAY_SIZE(da850_sata_xtal)) {
+ ret = -EINVAL;
+ goto err1;
+ } else {
*else* not needed here, after *goto*.
Yup, will fix.
Post by Sergei Shtylyov
Post by Sekhar Nori
+ val = SATA_PHY_MPY(i + 1);
+ }
+
[...]
Post by Sekhar Nori
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
index e4fc1af..aa6f08e 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
[...]
Post by Sekhar Nori
@@ -65,6 +66,7 @@ extern unsigned int da850_max_speed;
#define DA8XX_GPIO_BASE 0x01e26000
#define DA8XX_PSC1_BASE 0x01e27000
#define DA8XX_LCD_CNTRL_BASE 0x01e13000
+#define DA850_SATA_BASE 0x01e18000
It's used only in devices-da8xx.c -- shouldn't it be declared there?
Yes, will move. Base addresses for modules like LCD and MMCSD can be
moved as well - should be subject of some future clean-up patch.

Thanks,
Sekhar

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Sergei Shtylyov
2011-03-24 13:04:26 UTC
Permalink
Hello.
Post by Nori, Sekhar
Post by Sergei Shtylyov
Post by Sekhar Nori
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 68fe4c2..276199d 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -373,6 +373,14 @@ static struct clk spi1_clk = {
.flags = DA850_CLK_ASYNC3,
};
+static struct clk sata_clk = {
+ .name = "sata",
+ .parent =&pll0_sysclk2,
+ .lpsc = DA850_LPSC1_SATA,
+ .gpsc = 1,
+ .flags = PSC_FORCE,
+};
+
static struct clk_lookup da850_clks[] = {
CLK(NULL, "ref", &ref_clk),
CLK(NULL, "pll0", &pll0_clk),
@@ -419,6 +427,7 @@ static struct clk_lookup da850_clks[] = {
CLK(NULL, "usb20", &usb20_clk),
CLK("spi_davinci.0", NULL, &spi0_clk),
CLK("spi_davinci.1", NULL, &spi1_clk),
+ CLK("ahci", NULL, &sata_clk),
CLK(NULL, NULL, NULL),
};
I'd put the above into a separate patch...
Why should addition of clock data not be in the same patch
as the one which adds platform resources etc? It is not a big
deal to change, but I would like to know why you request this.
I didn't request anything, I just said what I'd have done. :-)
I think modifying the DA8xx-common and DA850-specific files should better be
done separately. Although in this case we're adding DA850 only device, so
perhaps the added code in devices-da8xx.c should be enclosed into #ifdef?
Post by Nori, Sekhar
Post by Sergei Shtylyov
Post by Sekhar Nori
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c
index 625d4b6..e061396 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
[...]
Post by Sekhar Nori
@@ -834,3 +836,139 @@ int __init da8xx_register_spi(int instance, struct spi_board_info *info,
[...]
Post by Sekhar Nori
+/* Supported DA850 SATA crystal frequencies */
+#define KHZ_TO_HZ(freq) ((freq) * 1000)
+static unsigned long da850_sata_xtal[] = {
+ KHZ_TO_HZ(300000),
+ KHZ_TO_HZ(250000),
+ 0, /* Reserved */
Why reserve a place for it at all?
Because then this table maps one-to-one to the hardware
defined table.
Ah, sorry, have missed that...
Post by Nori, Sekhar
Post by Sergei Shtylyov
Post by Sekhar Nori
+ val = SATA_PHY_MPY(i + 1);
+ }
+
[...]
Post by Sekhar Nori
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
index e4fc1af..aa6f08e 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
[...]
Post by Sekhar Nori
@@ -65,6 +66,7 @@ extern unsigned int da850_max_speed;
#define DA8XX_GPIO_BASE 0x01e26000
#define DA8XX_PSC1_BASE 0x01e27000
#define DA8XX_LCD_CNTRL_BASE 0x01e13000
+#define DA850_SATA_BASE 0x01e18000
It's used only in devices-da8xx.c -- shouldn't it be declared there?
Yes, will move. Base addresses for modules like LCD and MMCSD can be
moved as well - should be subject of some future clean-up patch.
Yes, maybe I'll submit one...
Post by Nori, Sekhar
Thanks,
Sekhar
WBR, Sergei
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Nori, Sekhar
2011-03-24 14:33:47 UTC
Permalink
Hi Sergei,
Post by Sergei Shtylyov
Hello.
Post by Nori, Sekhar
Post by Sergei Shtylyov
Post by Sekhar Nori
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 68fe4c2..276199d 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -373,6 +373,14 @@ static struct clk spi1_clk = {
.flags = DA850_CLK_ASYNC3,
};
+static struct clk sata_clk = {
+ .name = "sata",
+ .parent =&pll0_sysclk2,
+ .lpsc = DA850_LPSC1_SATA,
+ .gpsc = 1,
+ .flags = PSC_FORCE,
+};
+
static struct clk_lookup da850_clks[] = {
CLK(NULL, "ref", &ref_clk),
CLK(NULL, "pll0", &pll0_clk),
@@ -419,6 +427,7 @@ static struct clk_lookup da850_clks[] = {
CLK(NULL, "usb20", &usb20_clk),
CLK("spi_davinci.0", NULL, &spi0_clk),
CLK("spi_davinci.1", NULL, &spi1_clk),
+ CLK("ahci", NULL, &sata_clk),
CLK(NULL, NULL, NULL),
};
I'd put the above into a separate patch...
Why should addition of clock data not be in the same patch
as the one which adds platform resources etc? It is not a big
deal to change, but I would like to know why you request this.
I didn't request anything, I just said what I'd have done. :-)
Okay. I guess I will keep it as is.
Post by Sergei Shtylyov
I think modifying the DA8xx-common and DA850-specific files should better be
done separately. Although in this case we're adding DA850 only device, so
perhaps the added code in devices-da8xx.c should be enclosed into #ifdef?
Good point. Will add the #ifdef.
Post by Sergei Shtylyov
Post by Nori, Sekhar
Post by Sergei Shtylyov
Post by Sekhar Nori
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
index e4fc1af..aa6f08e 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
[...]
Post by Sekhar Nori
@@ -65,6 +66,7 @@ extern unsigned int da850_max_speed;
#define DA8XX_GPIO_BASE 0x01e26000
#define DA8XX_PSC1_BASE 0x01e27000
#define DA8XX_LCD_CNTRL_BASE 0x01e13000
+#define DA850_SATA_BASE 0x01e18000
It's used only in devices-da8xx.c -- shouldn't it be declared there?
Yes, will move. Base addresses for modules like LCD and MMCSD can be
moved as well - should be subject of some future clean-up patch.
Yes, maybe I'll submit one...
Thanks for the help!

Regards,
Sekhar

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Sergei Shtylyov
2011-03-24 18:01:57 UTC
Permalink
Hello.
Post by Nori, Sekhar
Post by Sergei Shtylyov
Post by Nori, Sekhar
Post by Sergei Shtylyov
Post by Sekhar Nori
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 68fe4c2..276199d 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -373,6 +373,14 @@ static struct clk spi1_clk = {
.flags = DA850_CLK_ASYNC3,
};
+static struct clk sata_clk = {
+ .name = "sata",
+ .parent =&pll0_sysclk2,
+ .lpsc = DA850_LPSC1_SATA,
+ .gpsc = 1,
+ .flags = PSC_FORCE,
+};
+
static struct clk_lookup da850_clks[] = {
CLK(NULL, "ref", &ref_clk),
CLK(NULL, "pll0", &pll0_clk),
@@ -419,6 +427,7 @@ static struct clk_lookup da850_clks[] = {
CLK(NULL, "usb20", &usb20_clk),
CLK("spi_davinci.0", NULL, &spi0_clk),
CLK("spi_davinci.1", NULL, &spi1_clk),
+ CLK("ahci", NULL, &sata_clk),
CLK(NULL, NULL, NULL),
};
I'd put the above into a separate patch...
Why should addition of clock data not be in the same patch
as the one which adds platform resources etc? It is not a big
deal to change, but I would like to know why you request this.
I didn't request anything, I just said what I'd have done. :-)
Okay. I guess I will keep it as is.
Post by Sergei Shtylyov
I think modifying the DA8xx-common and DA850-specific files should better be
done separately. Although in this case we're adding DA850 only device, so
perhaps the added code in devices-da8xx.c should be enclosed into #ifdef?
Good point. Will add the #ifdef.
Or perhaps the device should just be placed in da850.c instead?

WBR, Sergei

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Nori, Sekhar
2011-03-25 09:19:00 UTC
Permalink
Hi Sergei,
Post by Sergei Shtylyov
Hello.
Post by Nori, Sekhar
Post by Sergei Shtylyov
Post by Nori, Sekhar
Post by Sergei Shtylyov
Post by Sekhar Nori
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 68fe4c2..276199d 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -373,6 +373,14 @@ static struct clk spi1_clk = {
.flags = DA850_CLK_ASYNC3,
};
+static struct clk sata_clk = {
+ .name = "sata",
+ .parent =&pll0_sysclk2,
+ .lpsc = DA850_LPSC1_SATA,
+ .gpsc = 1,
+ .flags = PSC_FORCE,
+};
+
static struct clk_lookup da850_clks[] = {
CLK(NULL, "ref", &ref_clk),
CLK(NULL, "pll0", &pll0_clk),
@@ -419,6 +427,7 @@ static struct clk_lookup da850_clks[] = {
CLK(NULL, "usb20", &usb20_clk),
CLK("spi_davinci.0", NULL, &spi0_clk),
CLK("spi_davinci.1", NULL, &spi1_clk),
+ CLK("ahci", NULL, &sata_clk),
CLK(NULL, NULL, NULL),
};
I'd put the above into a separate patch...
Why should addition of clock data not be in the same patch
as the one which adds platform resources etc? It is not a big
deal to change, but I would like to know why you request this.
I didn't request anything, I just said what I'd have done. :-)
Okay. I guess I will keep it as is.
Post by Sergei Shtylyov
I think modifying the DA8xx-common and DA850-specific files should better be
done separately. Although in this case we're adding DA850 only device, so
perhaps the added code in devices-da8xx.c should be enclosed into #ifdef?
Good point. Will add the #ifdef.
Or perhaps the device should just be placed in da850.c instead?
Um, no. da850.c is currently free from any peripheral specific
functionality and would like to keep it that way. MMC/SD1 is
DA850 specific as well, and has been kept in devices-da8xx.c.
I think consolidating all peripheral specific code in devices-da8xx.c
is a better idea.

Thanks,
Sekhar

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Sekhar Nori
2011-03-23 11:32:27 UTC
Permalink
Some DaVinci modules like the SATA on DA850
need forced module state transitions.

Add a "force" parameter to the PSC config function
to enable it to make forced transitions.

Forced transitions shouldn't normally be attempted,
unless the TRM explicitly specifies its usage.

Signed-off-by: Sekhar Nori <nsekhar-***@public.gmane.org>
---
arch/arm/mach-davinci/clock.c | 8 +++++---
arch/arm/mach-davinci/clock.h | 1 +
arch/arm/mach-davinci/include/mach/psc.h | 3 ++-
arch/arm/mach-davinci/psc.c | 4 +++-
4 files changed, 11 insertions(+), 5 deletions(-)

diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c
index e4e3af1..3b659c3 100644
--- a/arch/arm/mach-davinci/clock.c
+++ b/arch/arm/mach-davinci/clock.c
@@ -44,7 +44,7 @@ static void __clk_enable(struct clk *clk)
__clk_enable(clk->parent);
if (clk->usecount++ == 0 && (clk->flags & CLK_PSC))
davinci_psc_config(psc_domain(clk), clk->gpsc, clk->lpsc,
- PSC_STATE_ENABLE);
+ PSC_STATE_ENABLE, !!(clk->flags & PSC_FORCE));
}

static void __clk_disable(struct clk *clk)
@@ -55,7 +55,8 @@ static void __clk_disable(struct clk *clk)
(clk->flags & CLK_PSC))
davinci_psc_config(psc_domain(clk), clk->gpsc, clk->lpsc,
(clk->flags & PSC_SWRSTDISABLE) ?
- PSC_STATE_SWRSTDISABLE : PSC_STATE_DISABLE);
+ PSC_STATE_SWRSTDISABLE : PSC_STATE_DISABLE,
+ !!(clk->flags & PSC_FORCE));
if (clk->parent)
__clk_disable(clk->parent);
}
@@ -240,7 +241,8 @@ static int __init clk_disable_unused(void)

davinci_psc_config(psc_domain(ck), ck->gpsc, ck->lpsc,
(ck->flags & PSC_SWRSTDISABLE) ?
- PSC_STATE_SWRSTDISABLE : PSC_STATE_DISABLE);
+ PSC_STATE_SWRSTDISABLE : PSC_STATE_DISABLE,
+ !!(ck->flags & PSC_FORCE));
}
spin_unlock_irq(&clockfw_lock);

diff --git a/arch/arm/mach-davinci/clock.h b/arch/arm/mach-davinci/clock.h
index 0dd2203..48ee462 100644
--- a/arch/arm/mach-davinci/clock.h
+++ b/arch/arm/mach-davinci/clock.h
@@ -111,6 +111,7 @@ struct clk {
#define CLK_PLL BIT(4) /* PLL-derived clock */
#define PRE_PLL BIT(5) /* source is before PLL mult/div */
#define PSC_SWRSTDISABLE BIT(6) /* Disable state is SwRstDisable */
+#define PSC_FORCE BIT(7) /* Force module state transtition */

#define CLK(dev, con, ck) \
{ \
diff --git a/arch/arm/mach-davinci/include/mach/psc.h b/arch/arm/mach-davinci/include/mach/psc.h
index 1110fdd..394b535 100644
--- a/arch/arm/mach-davinci/include/mach/psc.h
+++ b/arch/arm/mach-davinci/include/mach/psc.h
@@ -244,12 +244,13 @@
#define PSC_STATE_ENABLE 3

#define MDSTAT_STATE_MASK 0x1f
+#define MDCTL_FORCE BIT(31)

#ifndef __ASSEMBLER__

extern int davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id);
extern void davinci_psc_config(unsigned int domain, unsigned int ctlr,
- unsigned int id, u32 next_state);
+ unsigned int id, u32 next_state, bool force);

#endif

diff --git a/arch/arm/mach-davinci/psc.c b/arch/arm/mach-davinci/psc.c
index a415804..651fcbf 100644
--- a/arch/arm/mach-davinci/psc.c
+++ b/arch/arm/mach-davinci/psc.c
@@ -48,7 +48,7 @@ int __init davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id)

/* Enable or disable a PSC domain */
void davinci_psc_config(unsigned int domain, unsigned int ctlr,
- unsigned int id, u32 next_state)
+ unsigned int id, u32 next_state, bool force)
{
u32 epcpr, ptcmd, ptstat, pdstat, pdctl1, mdstat, mdctl;
void __iomem *psc_base;
@@ -65,6 +65,8 @@ void davinci_psc_config(unsigned int domain, unsigned int ctlr,
mdctl = __raw_readl(psc_base + MDCTL + 4 * id);
mdctl &= ~MDSTAT_STATE_MASK;
mdctl |= next_state;
+ if (force)
+ mdctl |= MDCTL_FORCE;
__raw_writel(mdctl, psc_base + MDCTL + 4 * id);

pdstat = __raw_readl(psc_base + PDSTAT);
--
1.7.3.2
Sekhar Nori
2011-03-25 17:00:00 UTC
Permalink
Register the platform device for SATA interface
present on the DA850/OMAP-L138/AM18x EVM.

Signed-off-by: Sekhar Nori <***@ti.com>
Cc: linux-***@vger.kernel.org
---
arch/arm/mach-davinci/board-da850-evm.c | 7 +++++++
1 files changed, 7 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c
index a7b41bf..3d2c0d7 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -1117,6 +1117,8 @@ static __init int da850_evm_init_cpufreq(void)
static __init int da850_evm_init_cpufreq(void) { return 0; }
#endif

+#define DA850EVM_SATA_REFCLKPN_RATE (100 * 1000 * 1000)
+
static __init void da850_evm_init(void)
{
int ret;
@@ -1237,6 +1239,11 @@ static __init void da850_evm_init(void)
if (ret)
pr_warning("da850_evm_init: spi 1 registration failed: %d\n",
ret);
+
+ ret = da850_register_sata(DA850EVM_SATA_REFCLKPN_RATE);
+ if (ret)
+ pr_warning("da850_evm_init: sata registration failed: %d\n",
+ ret);
}

#ifdef CONFIG_SERIAL_8250_CONSOLE
--
1.7.3.2

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Sekhar Nori
2011-03-25 16:59:58 UTC
Permalink
Some DaVinci modules like the SATA on DA850
need forced module state transitions.

Add a "force" parameter to the PSC config function
to enable it to make forced transitions.

Forced transitions shouldn't normally be attempted,
unless the TRM explicitly specifies its usage.

Signed-off-by: Sekhar Nori <nsekhar-***@public.gmane.org>
---
arch/arm/mach-davinci/clock.c | 8 +++++---
arch/arm/mach-davinci/clock.h | 1 +
arch/arm/mach-davinci/include/mach/psc.h | 3 ++-
arch/arm/mach-davinci/psc.c | 4 +++-
4 files changed, 11 insertions(+), 5 deletions(-)

diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c
index e4e3af1..3b659c3 100644
--- a/arch/arm/mach-davinci/clock.c
+++ b/arch/arm/mach-davinci/clock.c
@@ -44,7 +44,7 @@ static void __clk_enable(struct clk *clk)
__clk_enable(clk->parent);
if (clk->usecount++ == 0 && (clk->flags & CLK_PSC))
davinci_psc_config(psc_domain(clk), clk->gpsc, clk->lpsc,
- PSC_STATE_ENABLE);
+ PSC_STATE_ENABLE, !!(clk->flags & PSC_FORCE));
}

static void __clk_disable(struct clk *clk)
@@ -55,7 +55,8 @@ static void __clk_disable(struct clk *clk)
(clk->flags & CLK_PSC))
davinci_psc_config(psc_domain(clk), clk->gpsc, clk->lpsc,
(clk->flags & PSC_SWRSTDISABLE) ?
- PSC_STATE_SWRSTDISABLE : PSC_STATE_DISABLE);
+ PSC_STATE_SWRSTDISABLE : PSC_STATE_DISABLE,
+ !!(clk->flags & PSC_FORCE));
if (clk->parent)
__clk_disable(clk->parent);
}
@@ -240,7 +241,8 @@ static int __init clk_disable_unused(void)

davinci_psc_config(psc_domain(ck), ck->gpsc, ck->lpsc,
(ck->flags & PSC_SWRSTDISABLE) ?
- PSC_STATE_SWRSTDISABLE : PSC_STATE_DISABLE);
+ PSC_STATE_SWRSTDISABLE : PSC_STATE_DISABLE,
+ !!(ck->flags & PSC_FORCE));
}
spin_unlock_irq(&clockfw_lock);

diff --git a/arch/arm/mach-davinci/clock.h b/arch/arm/mach-davinci/clock.h
index 0dd2203..48ee462 100644
--- a/arch/arm/mach-davinci/clock.h
+++ b/arch/arm/mach-davinci/clock.h
@@ -111,6 +111,7 @@ struct clk {
#define CLK_PLL BIT(4) /* PLL-derived clock */
#define PRE_PLL BIT(5) /* source is before PLL mult/div */
#define PSC_SWRSTDISABLE BIT(6) /* Disable state is SwRstDisable */
+#define PSC_FORCE BIT(7) /* Force module state transtition */

#define CLK(dev, con, ck) \
{ \
diff --git a/arch/arm/mach-davinci/include/mach/psc.h b/arch/arm/mach-davinci/include/mach/psc.h
index 1110fdd..394b535 100644
--- a/arch/arm/mach-davinci/include/mach/psc.h
+++ b/arch/arm/mach-davinci/include/mach/psc.h
@@ -244,12 +244,13 @@
#define PSC_STATE_ENABLE 3

#define MDSTAT_STATE_MASK 0x1f
+#define MDCTL_FORCE BIT(31)

#ifndef __ASSEMBLER__

extern int davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id);
extern void davinci_psc_config(unsigned int domain, unsigned int ctlr,
- unsigned int id, u32 next_state);
+ unsigned int id, u32 next_state, bool force);

#endif

diff --git a/arch/arm/mach-davinci/psc.c b/arch/arm/mach-davinci/psc.c
index a415804..651fcbf 100644
--- a/arch/arm/mach-davinci/psc.c
+++ b/arch/arm/mach-davinci/psc.c
@@ -48,7 +48,7 @@ int __init davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id)

/* Enable or disable a PSC domain */
void davinci_psc_config(unsigned int domain, unsigned int ctlr,
- unsigned int id, u32 next_state)
+ unsigned int id, u32 next_state, bool force)
{
u32 epcpr, ptcmd, ptstat, pdstat, pdctl1, mdstat, mdctl;
void __iomem *psc_base;
@@ -65,6 +65,8 @@ void davinci_psc_config(unsigned int domain, unsigned int ctlr,
mdctl = __raw_readl(psc_base + MDCTL + 4 * id);
mdctl &= ~MDSTAT_STATE_MASK;
mdctl |= next_state;
+ if (force)
+ mdctl |= MDCTL_FORCE;
__raw_writel(mdctl, psc_base + MDCTL + 4 * id);

pdstat = __raw_readl(psc_base + PDSTAT);
--
1.7.3.2
Sekhar Nori
2011-03-25 16:59:59 UTC
Permalink
Add support for SATA controller on the
DA850/OMAP-L138/AM18x devices.

The patch adds the necessary clocks, platform
resources and a routine to initialize the SATA
controller.

The PHY configuration in this patch is
courtesy the work done by Zegeye Alemu,
Swaminathan and Mansoor Ahamed from TI.

While testing this patch, enable port multiplier
support iff you are actually using one. The
reasons of this behaviour are discussed
here: http://patchwork.ozlabs.org/patch/78163/

Signed-off-by: Sekhar Nori <***@ti.com>
Cc: linux-***@vger.kernel.org
Cc: Sergei Shtylyov <***@mvista.com>
---
Since v1, fixed comments from Sergei Shtylyov

arch/arm/mach-davinci/da850.c | 9 ++
arch/arm/mach-davinci/devices-da8xx.c | 140 ++++++++++++++++++++++++++++
arch/arm/mach-davinci/include/mach/da8xx.h | 2 +
3 files changed, 151 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 68fe4c2..276199d 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -373,6 +373,14 @@ static struct clk spi1_clk = {
.flags = DA850_CLK_ASYNC3,
};

+static struct clk sata_clk = {
+ .name = "sata",
+ .parent = &pll0_sysclk2,
+ .lpsc = DA850_LPSC1_SATA,
+ .gpsc = 1,
+ .flags = PSC_FORCE,
+};
+
static struct clk_lookup da850_clks[] = {
CLK(NULL, "ref", &ref_clk),
CLK(NULL, "pll0", &pll0_clk),
@@ -419,6 +427,7 @@ static struct clk_lookup da850_clks[] = {
CLK(NULL, "usb20", &usb20_clk),
CLK("spi_davinci.0", NULL, &spi0_clk),
CLK("spi_davinci.1", NULL, &spi1_clk),
+ CLK("ahci", NULL, &sata_clk),
CLK(NULL, NULL, NULL),
};

diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c
index 625d4b6..43e8b0d 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -14,6 +14,8 @@
#include <linux/platform_device.h>
#include <linux/dma-mapping.h>
#include <linux/serial_8250.h>
+#include <linux/ahci_platform.h>
+#include <linux/clk.h>

#include <mach/cputype.h>
#include <mach/common.h>
@@ -834,3 +836,141 @@ int __init da8xx_register_spi(int instance, struct spi_board_info *info,

return platform_device_register(&da8xx_spi_device[instance]);
}
+
+#ifdef CONFIG_ARCH_DAVINCI_DA850
+
+#define DA850_SATA_BASE 0x01e18000
+static struct resource da850_sata_resources[] = {
+ {
+ .start = DA850_SATA_BASE,
+ .end = DA850_SATA_BASE + 0x1fff,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = IRQ_DA850_SATAINT,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+/* SATA PHY Control Register offset from AHCI base */
+#define SATA_P0PHYCR_REG 0x178
+
+#define SATA_PHY_MPY(x) ((x) << 0)
+#define SATA_PHY_LB(x) ((x) << 4)
+#define SATA_PHY_LOS(x) ((x) << 6)
+#define SATA_PHY_RXINVPAIR(x) ((x) << 7)
+#define SATA_PHY_RXTERM(x) ((x) << 8)
+#define SATA_PHY_RXCDR(x) ((x) << 10)
+#define SATA_PHY_RXEQ(x) ((x) << 13)
+#define SATA_PHY_TXINVPAIR(x) ((x) << 17)
+#define SATA_PHY_TXCM(x) ((x) << 18)
+#define SATA_PHY_TXSWING(x) ((x) << 19)
+#define SATA_PHY_TXDE(x) ((x) << 22)
+#define SATA_PHY_OVERRIDE(x) ((x) << 30)
+#define SATA_PHY_ENPLL(x) ((x) << 31)
+
+static struct clk *da850_sata_clk;
+static unsigned long da850_sata_refclkpn;
+
+/* Supported DA850 SATA crystal frequencies */
+#define KHZ_TO_HZ(freq) ((freq) * 1000)
+static unsigned long da850_sata_xtal[] = {
+ KHZ_TO_HZ(300000),
+ KHZ_TO_HZ(250000),
+ 0, /* Reserved */
+ KHZ_TO_HZ(187500),
+ KHZ_TO_HZ(150000),
+ KHZ_TO_HZ(125000),
+ KHZ_TO_HZ(120000),
+ KHZ_TO_HZ(100000),
+ KHZ_TO_HZ(75000),
+ KHZ_TO_HZ(60000),
+};
+
+static int da850_sata_init(struct device *dev, void __iomem *addr)
+{
+ int i, ret;
+ unsigned int val;
+
+ da850_sata_clk = clk_get(dev, NULL);
+ if (IS_ERR(da850_sata_clk))
+ return PTR_ERR(da850_sata_clk);
+
+ ret = clk_enable(da850_sata_clk);
+ if (ret)
+ goto err0;
+
+ /* Enable SATA clock receiver */
+ val = __raw_readl(DA8XX_SYSCFG1_VIRT(DA8XX_PWRDN_REG));
+ val &= ~BIT(0);
+ __raw_writel(val, DA8XX_SYSCFG1_VIRT(DA8XX_PWRDN_REG));
+
+ /* Get the multiplier needed for 1.5GHz PLL output */
+ for (i = 0; i < ARRAY_SIZE(da850_sata_xtal); i++)
+ if (da850_sata_xtal[i] == da850_sata_refclkpn)
+ break;
+
+ if (i == ARRAY_SIZE(da850_sata_xtal)) {
+ ret = -EINVAL;
+ goto err1;
+ }
+
+ val = SATA_PHY_MPY(i + 1) |
+ SATA_PHY_LB(0) |
+ SATA_PHY_LOS(1) |
+ SATA_PHY_RXINVPAIR(0) |
+ SATA_PHY_RXTERM(0) |
+ SATA_PHY_RXCDR(4) |
+ SATA_PHY_RXEQ(1) |
+ SATA_PHY_TXINVPAIR(0) |
+ SATA_PHY_TXCM(0) |
+ SATA_PHY_TXSWING(3) |
+ SATA_PHY_TXDE(0) |
+ SATA_PHY_OVERRIDE(0) |
+ SATA_PHY_ENPLL(1);
+
+ __raw_writel(val, addr + SATA_P0PHYCR_REG);
+
+ return 0;
+
+err1:
+ clk_disable(da850_sata_clk);
+err0:
+ clk_put(da850_sata_clk);
+ return ret;
+}
+
+static void da850_sata_exit(struct device *dev)
+{
+ clk_disable(da850_sata_clk);
+ clk_put(da850_sata_clk);
+}
+
+static struct ahci_platform_data da850_sata_pdata = {
+ .init = da850_sata_init,
+ .exit = da850_sata_exit,
+};
+
+static u64 da850_sata_dmamask = DMA_BIT_MASK(32);
+
+static struct platform_device da850_sata_device = {
+ .name = "ahci",
+ .id = -1,
+ .dev = {
+ .platform_data = &da850_sata_pdata,
+ .dma_mask = &da850_sata_dmamask,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
+ },
+ .num_resources = ARRAY_SIZE(da850_sata_resources),
+ .resource = da850_sata_resources,
+};
+
+int __init da850_register_sata(unsigned long refclkpn)
+{
+ da850_sata_refclkpn = refclkpn;
+ if (!da850_sata_refclkpn)
+ return -EINVAL;
+
+ return platform_device_register(&da850_sata_device);
+}
+#endif
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
index e4fc1af..c4350a1 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -57,6 +57,7 @@ extern unsigned int da850_max_speed;
#define DA8XX_SYSCFG1_BASE (IO_PHYS + 0x22C000)
#define DA8XX_SYSCFG1_VIRT(x) (da8xx_syscfg1_base + (x))
#define DA8XX_DEEPSLEEP_REG 0x8
+#define DA8XX_PWRDN_REG 0x18

#define DA8XX_PSC0_BASE 0x01c10000
#define DA8XX_PLL0_BASE 0x01c11000
@@ -93,6 +94,7 @@ int da850_register_cpufreq(char *async_clk);
int da8xx_register_cpuidle(void);
void __iomem * __init da8xx_get_mem_ctlr(void);
int da850_register_pm(struct platform_device *pdev);
+int __init da850_register_sata(unsigned long refclkpn);

extern struct platform_device da8xx_serial_device;
extern struct emac_platform_data da8xx_emac_pdata;
--
1.7.3.2

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Nori, Sekhar
2011-06-24 16:45:27 UTC
Permalink
Hi Russell, SubArch team,

This series of 4 patches added SATA support on DaVinci
DA850 platform. This was ready for last merge window,
but was not queued because of the negative diffstat
rule.

Is there a possibility of queuing this for the v3.1 merge?

Here is the archive link of this posting:

http://linux.davincidsp.com/pipermail/davinci-linux-open-source/2011-March/022473.html

Here is the summary diffstat:

arch/arm/mach-davinci/board-da850-evm.c | 7 ++
arch/arm/mach-davinci/clock.c | 8 +-
arch/arm/mach-davinci/clock.h | 1 +
arch/arm/mach-davinci/da850.c | 9 ++
arch/arm/mach-davinci/devices-da8xx.c | 122 ++++++++++++++++++++++
arch/arm/mach-davinci/include/mach/da8xx.h | 2 +
arch/arm/mach-davinci/include/mach/psc.h | 151 ++++++++++++++--------------
arch/arm/mach-davinci/psc.c | 4 +-
8 files changed, 225 insertions(+), 79 deletions(-)

Thanks,
Sekhar
Arnd Bergmann
2011-06-25 17:48:19 UTC
Permalink
Post by Nori, Sekhar
This series of 4 patches added SATA support on DaVinci
DA850 platform. This was ready for last merge window,
but was not queued because of the negative diffstat
rule.
Is there a possibility of queuing this for the v3.1 merge?
http://linux.davincidsp.com/pipermail/davinci-linux-open-source/2011-March/022473.html
My general idea is to have multiple branches per subarchitecture,
and I started merging stuff into the tree now.

Your series contains both cleanups and support for additional
features, and I'd like to see those split into separate branches.

Please make sure the patches apply on top of 2.6.39 and resubmit
them, separating out the first cleanup patch from the others.

We can definitely forward all cleanups and bug fixes in the each
merge window. For new features, it mostly depends on how much
code gets added that should not really be needed in a perfect
world, relative to the amount of cleanups that is actually
going into the platform in order to get there.

In case of the SATA support, the feature is relatively small
and requires little board-specific code, which is good.
However, if you are planning to push a lot of small additions
like this, I would expect you spend much more effort on
consolidation within davinci and migration towards device
tree probing first.

What else do you have pending for davinci in 3.1? Can you
send pull requests for cleanups/fixes/device-tree/features?

Arnd
Nori, Sekhar
2011-06-27 14:27:17 UTC
Permalink
Hi Arnd,
Post by Arnd Bergmann
Post by Nori, Sekhar
This series of 4 patches added SATA support on DaVinci
DA850 platform. This was ready for last merge window,
but was not queued because of the negative diffstat
rule.
Is there a possibility of queuing this for the v3.1 merge?
http://linux.davincidsp.com/pipermail/davinci-linux-open-source/2011-March/022473.html
My general idea is to have multiple branches per subarchitecture,
and I started merging stuff into the tree now.
Your series contains both cleanups and support for additional
features, and I'd like to see those split into separate branches.
Okay.
Post by Arnd Bergmann
Please make sure the patches apply on top of 2.6.39 and resubmit
them, separating out the first cleanup patch from the others.
Is it 2.6.39 or v3.0-rc? Linux-next is currently at v3.0-rc4.

I can create a branch with just the clean-up stuff and
another branch with the features (and its dependencies
from fixes/clean-up).

By "resubmit" I assume you are not asking for a re-send
of the patches to the mailing list (I can do that if you
want).
Post by Arnd Bergmann
We can definitely forward all cleanups and bug fixes in the each
merge window. For new features, it mostly depends on how much
code gets added that should not really be needed in a perfect
world, relative to the amount of cleanups that is actually
going into the platform in order to get there.
Okay.
Post by Arnd Bergmann
In case of the SATA support, the feature is relatively small
and requires little board-specific code, which is good.
However, if you are planning to push a lot of small additions
like this, I would expect you spend much more effort on
consolidation within davinci and migration towards device
tree probing first.
I don't see new SoCs/boards getting added to the DaVinci
tree in the near term but there are some features of existing
platforms (like USB on DM365 or SATA on DA850) which are missing
in mainline for which there are patches being sent.

To my knowledge, there isn't any ongoing work on moving DaVinci
to device tree. I am working on getting the low(er) hanging things
like GPIO movement to drivers/gpio done. DaVinci will eventually
move to device-tree, but may be not as soon as OMAP where
there is a lot more active work ongoing.
Post by Arnd Bergmann
What else do you have pending for davinci in 3.1? Can you
send pull requests for cleanups/fixes/device-tree/features?
Actually not quite a lot at the moment, but there are some
patches which are waiting for acks/dependencies and some
pending re-work.

I will send a pull request with what has been reviewed and
accepted already.

I guess I also need to ask Stephen Rothwell to remove the
DaVinci next branch from the list of branches he is merging
for linux-next.

Thanks,
Sekhar
Arnd Bergmann
2011-06-27 15:25:14 UTC
Permalink
Post by Nori, Sekhar
Post by Arnd Bergmann
Please make sure the patches apply on top of 2.6.39 and resubmit
them, separating out the first cleanup patch from the others.
Is it 2.6.39 or v3.0-rc? Linux-next is currently at v3.0-rc4.
If there are no conflicts with 3.0-rc changes, submitting
based on the previous release (2.6.39) is ok, otherwise just
pick the most recent -rc release. Best avoid basing on top
of an arbitrary commit between two -rc though.
Post by Nori, Sekhar
I can create a branch with just the clean-up stuff and
another branch with the features (and its dependencies
from fixes/clean-up).
By "resubmit" I assume you are not asking for a re-send
of the patches to the mailing list (I can do that if you
want).
I'd prefer submission in form of a git-pull request in this
case, but sending to the mailing list is ok, too.
Post by Nori, Sekhar
Post by Arnd Bergmann
In case of the SATA support, the feature is relatively small
and requires little board-specific code, which is good.
However, if you are planning to push a lot of small additions
like this, I would expect you spend much more effort on
consolidation within davinci and migration towards device
tree probing first.
I don't see new SoCs/boards getting added to the DaVinci
tree in the near term but there are some features of existing
platforms (like USB on DM365 or SATA on DA850) which are missing
in mainline for which there are patches being sent.
To my knowledge, there isn't any ongoing work on moving DaVinci
to device tree. I am working on getting the low(er) hanging things
like GPIO movement to drivers/gpio done. DaVinci will eventually
move to device-tree, but may be not as soon as OMAP where
there is a lot more active work ongoing.
Yes, makes sense since you are working on both.
Post by Nori, Sekhar
Post by Arnd Bergmann
What else do you have pending for davinci in 3.1? Can you
send pull requests for cleanups/fixes/device-tree/features?
Actually not quite a lot at the moment, but there are some
patches which are waiting for acks/dependencies and some
pending re-work.
I will send a pull request with what has been reviewed and
accepted already.
Ok. Do you also have a public tree with all the patches that
you would hope to get merged eventually? I'd just like to
get an impression of what's to come.
Post by Nori, Sekhar
I guess I also need to ask Stephen Rothwell to remove the
DaVinci next branch from the list of branches he is merging
for linux-next.
Yes, that would be good, but we might need to do that in a
more coordinated way for all the ARM platforms once they
are reasonably merged into my tree.

Arnd
Nori, Sekhar
2011-06-28 13:24:24 UTC
Permalink
Hi Arnd,
Post by Arnd Bergmann
Ok. Do you also have a public tree with all the patches that
you would hope to get merged eventually? I'd just like to
get an impression of what's to come.
You can have a look at the git tree:

git://gitorious.org/linux-davinci/linux-davinci.git

The branch "davinci-next-2" is where the accepted patches have
been committed. I have deliberately kept them in a branch not
included in linux-next.

Thanks,
Sekhar

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