Discussion:
[RFC v6 0/3] gpio: add DT support for memory-mapped GPIOs
(too old to reply)
Christian Lamparter
2016-05-01 12:18:36 UTC
Permalink
This patch series adds device tree support for generic memory-mapped GPIOs.
The GPIO library already allows drivers and architecture support code to
reuse generic code for managing a GPIO chip. Currently, a developer has
to create a platform device "basic-mmio-gpio" and attach a bgpio_pdata
platform data structure to make use of it. However, for architectures
which rely on the device tree to enumerate devices, creating custom
platform devices is another extra step that can be avoided by having
direct support via a device tree binding.

I initially came across this patch [0] from Álvaro Fernández Rojas,
while looking for an easy way to add support for the GPIO of my
WD MyBook Live [1] (APM82181 - ppc464). His generic approach patch
allowed me to easily get the GPIO (and the connected LEDs,
buttons, gpiohogs, etc.) up and running. Even thought, Mr. Fernandez
initially developed it for his work on the brcm63xx [2].

The drivers for gpio-clps711x, gpio-ge, gpio-moxart and gpio-ts4800
are now part of the gpio-mmio.c driver. The old driver files have
been removed and the Kconfig, Makefile entries have been updated
accordingly.
333 insertions(+), 411 deletions(-) <<<
It still removes more lines than it adds!

Thanks! (Please keep me in the CC)

[0] <https://patchwork.ozlabs.org/patch/422121/>
[1] <https://github.com/chunkeey/MBL-openwrt>
[2] <https://wiki.openwrt.org/doc/hardware/soc/soc.broadcom.bcm63xx>

changelog:

v5 -> v6:
- rewrote bindings and driver patch to fit the wd,mbl-gpio
- unified parser code for gpio-ge, gpio-moxart and gpio-ts4800
- fixed gpio chip's base being overwritten with bogus "0"
- fixed compat driver crash when reload gpio-generic.ko module
- dropped already applied patches from the series
- rebased code on linus' devel tree
- moved dt bindings patch to the top of the series

v4 -> v5:
- reverted rename of gpio-mmio.c back to gpio-generic.c
- fixed Andy Shevchenko's comments
- consolidated changes from clps711x, gpio-ge, gpio-moxart and
gpio-ts4800 into one patch.

v3 -> v4:
- renamed gpio-generic.c to gpio-mmio.c
- changed compat. string to "linux,gpio-mmio"
- integrated Cirrus clps711x driver
- integrated GE FGPA gpio-ge driver
- integrated MOXA ART GPIO driver
- integrated TS4800 gpio driver
- reshuffled patches, reworded commits, fixed spelling errors, etc.

Christian Lamparter (2):
gpio: dt-bindings: add wd,mbl-gpio bindings
gpio: move clps711x, moxart, ts4800 and gpio-ge into gpio-mmio

Álvaro Fernández Rojas (1):
gpio: mmio: add DT support for memory-mapped GPIOs

.../devicetree/bindings/gpio/wd,mbl-gpio.txt | 38 +++
drivers/gpio/Kconfig | 43 +--
drivers/gpio/Makefile | 4 -
drivers/gpio/gpio-clps711x.c | 91 -------
drivers/gpio/gpio-ge.c | 114 --------
drivers/gpio/gpio-mmio.c | 289 ++++++++++++++++++++-
drivers/gpio/gpio-moxart.c | 84 ------
drivers/gpio/gpio-ts4800.c | 81 ------
8 files changed, 333 insertions(+), 411 deletions(-)
create mode 100644 Documentation/devicetree/bindings/gpio/wd,mbl-gpio.txt
delete mode 100644 drivers/gpio/gpio-clps711x.c
delete mode 100644 drivers/gpio/gpio-ge.c
delete mode 100644 drivers/gpio/gpio-moxart.c
delete mode 100644 drivers/gpio/gpio-ts4800.c
--
2.8.1
Christian Lamparter
2016-05-01 12:18:38 UTC
Permalink
From: Álvaro Fernández Rojas <***@gmail.com>

This patch adds support for defining memory-mapped GPIOs which
are compatible with the existing gpio-mmio interface. The generic
library provides support for many memory-mapped GPIO controllers
that are found in various on-board FPGA and ASIC solutions that
are used to control board's switches, LEDs, chip-selects,
Ethernet/USB PHY power, etc.

For setting GPIO's there are three configurations:
1. single input/output register resource (named "dat"),
2. set/clear pair (named "set" and "clr"),
3. single output register resource and single input resource
("set" and dat").

The configuration is detected by which resources are present.
For the single output register, this drives a 1 by setting a bit
and a zero by clearing a bit. For the set clr pair, this drives
a 1 by setting a bit in the set register and clears it by setting
a bit in the clear register. The configuration is detected by
which resources are present.

For setting the GPIO direction, there are three configurations:
a. simple bidirectional GPIOs that requires no configuration.
b. an output direction register (named "dirout")
where a 1 bit indicates the GPIO is an output.
c. an input direction register (named "dirin")
where a 1 bit indicates the GPIO is an input.

The first user for this binding is "wd,mbl-gpio".

Signed-off-by: Álvaro Fernández Rojas <***@gmail.com>
Signed-off-by: Christian Lamparter <***@googlemail.com>
---
drivers/gpio/gpio-mmio.c | 99 +++++++++++++++++++++++++++++++++++++++++++++++-
1 file changed, 97 insertions(+), 2 deletions(-)

diff --git a/drivers/gpio/gpio-mmio.c b/drivers/gpio/gpio-mmio.c
index 6c1cb3b..1cfb70a 100644
--- a/drivers/gpio/gpio-mmio.c
+++ b/drivers/gpio/gpio-mmio.c
@@ -61,6 +61,8 @@ o ` ~~~~\___/~~~~ ` controller in FPGA is ,.`
#include <linux/bitops.h>
#include <linux/platform_device.h>
#include <linux/mod_devicetable.h>
+#include <linux/of.h>
+#include <linux/of_device.h>

static void bgpio_write8(void __iomem *reg, unsigned long data)
{
@@ -569,6 +571,89 @@ static void __iomem *bgpio_map(struct platform_device *pdev,
return devm_ioremap_resource(&pdev->dev, r);
}

+#ifdef CONFIG_OF
+static int bgpio_basic_mmio_parse_dt(struct platform_device *pdev,
+ struct bgpio_pdata *pdata,
+ unsigned long *flags)
+{
+ struct device *dev = &pdev->dev;
+ int err;
+
+ pdata->base = -1;
+ /* If ngpio property is not specified, of_property_read_u32
+ * will return -EINVAL. In this case the number of GPIOs is
+ * automatically determined by the register width. Any
+ * other error of of_property_read_u32 is due bad data and
+ * needs to be dealt with.
+ */
+ err = of_property_read_u32(dev->of_node, "ngpio", &pdata->ngpio);
+ if (err && err != -EINVAL)
+ return err;
+
+ if (of_device_is_big_endian(dev->of_node))
+ *flags |= BGPIOF_BIG_ENDIAN_BYTE_ORDER;
+
+ if (of_property_read_bool(dev->of_node, "unreadable-reg-set"))
+ *flags |= BGPIOF_UNREADABLE_REG_SET;
+
+ if (of_property_read_bool(dev->of_node, "unreadable-reg-dir"))
+ *flags |= BGPIOF_UNREADABLE_REG_DIR;
+
+ if (of_property_read_bool(dev->of_node, "big-endian-byte-order"))
+ *flags |= BGPIOF_BIG_ENDIAN;
+
+ if (of_property_read_bool(dev->of_node, "read-output-reg-set"))
+ *flags |= BGPIOF_READ_OUTPUT_REG_SET;
+
+ if (of_property_read_bool(dev->of_node, "no-output"))
+ *flags |= BGPIOF_NO_OUTPUT;
+ return 0;
+}
+
+#define ADD(_name, _func) { .compatible = _name, .data = _func }
+
+static const struct of_device_id bgpio_of_match[] = {
+ ADD("wd,mbl-gpio", bgpio_basic_mmio_parse_dt),
+ { }
+};
+#undef ADD
+MODULE_DEVICE_TABLE(of, bgpio_of_match);
+
+static struct bgpio_pdata *bgpio_parse_dt(struct platform_device *pdev,
+ unsigned long *flags)
+{
+ const int (*parse_dt)(struct platform_device *,
+ struct bgpio_pdata *, unsigned long *);
+ const struct device_node *node = pdev->dev.of_node;
+ const struct of_device_id *of_id;
+ struct bgpio_pdata *pdata;
+ int err = -ENODEV;
+
+ of_id = of_match_node(bgpio_of_match, node);
+ if (!of_id)
+ return NULL;
+
+ pdata = devm_kzalloc(&pdev->dev, sizeof(struct bgpio_pdata),
+ GFP_KERNEL);
+ if (!pdata)
+ return ERR_PTR(-ENOMEM);
+
+ parse_dt = (const void *)of_id->data;
+ if (parse_dt)
+ err = parse_dt(pdev, pdata, flags);
+ if (err)
+ return ERR_PTR(err);
+
+ return pdata;
+}
+#else
+static struct bgpio_pdata *bgpio_parse_dt(struct platform_device *pdev,
+ unsigned long *flags)
+{
+ return NULL;
+}
+#endif /* CONFIG_OF */
+
static int bgpio_pdev_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
@@ -579,10 +664,19 @@ static int bgpio_pdev_probe(struct platform_device *pdev)
void __iomem *dirout;
void __iomem *dirin;
unsigned long sz;
- unsigned long flags = pdev->id_entry->driver_data;
+ unsigned long flags = 0;
int err;
struct gpio_chip *gc;
- struct bgpio_pdata *pdata = dev_get_platdata(dev);
+ struct bgpio_pdata *pdata;
+
+ pdata = bgpio_parse_dt(pdev, &flags);
+ if (IS_ERR(pdata))
+ return PTR_ERR(pdata);
+
+ if (!pdata) {
+ pdata = dev_get_platdata(dev);
+ flags = pdev->id_entry->driver_data;
+ }

r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dat");
if (!r)
@@ -646,6 +740,7 @@ MODULE_DEVICE_TABLE(platform, bgpio_id_table);
static struct platform_driver bgpio_driver = {
.driver = {
.name = "basic-mmio-gpio",
+ .of_match_table = of_match_ptr(bgpio_of_match),
},
.id_table = bgpio_id_table,
.probe = bgpio_pdev_probe,
--
2.8.1
Christian Lamparter
2016-05-01 12:18:39 UTC
Permalink
This patch integrates these GPIO drivers into gpio-mmio.

Signed-off-by: Christian Lamparter <***@googlemail.com>
---
drivers/gpio/Kconfig | 43 ++--------
drivers/gpio/Makefile | 4 -
drivers/gpio/gpio-clps711x.c | 91 ---------------------
drivers/gpio/gpio-ge.c | 114 --------------------------
drivers/gpio/gpio-mmio.c | 190 +++++++++++++++++++++++++++++++++++++++++++
drivers/gpio/gpio-moxart.c | 84 -------------------
drivers/gpio/gpio-ts4800.c | 81 ------------------
7 files changed, 198 insertions(+), 409 deletions(-)
delete mode 100644 drivers/gpio/gpio-clps711x.c
delete mode 100644 drivers/gpio/gpio-ge.c
delete mode 100644 drivers/gpio/gpio-moxart.c
delete mode 100644 drivers/gpio/gpio-ts4800.c

diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index f73f26b..df6ca48 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -152,13 +152,6 @@ config GPIO_BRCMSTB
help
Say yes here to enable GPIO support for Broadcom STB (BCM7XXX) SoCs.

-config GPIO_CLPS711X
- tristate "CLPS711X GPIO support"
- depends on ARCH_CLPS711X || COMPILE_TEST
- select GPIO_GENERIC
- help
- Say yes here to support GPIO on CLPS711X SoCs.
-
config GPIO_DAVINCI
bool "TI Davinci/Keystone GPIO support"
default y if ARCH_DAVINCI
@@ -194,22 +187,18 @@ config GPIO_ETRAXFS
help
Say yes here to support the GPIO controller on Axis ETRAX FS SoCs.

-config GPIO_GE_FPGA
- bool "GE FPGA based GPIO"
- depends on GE_FPGA
- select GPIO_GENERIC
- help
- Support for common GPIO functionality provided on some GE Single Board
- Computers.
-
- This driver provides basic support (configure as input or output, read
- and write pin state) for GPIO implemented in a number of GE single
- board computers.
-
config GPIO_GENERIC_PLATFORM
tristate "Generic memory-mapped GPIO controller support (MMIO platform device)"
select GPIO_GENERIC
help
+ Select this to support many generic memory-mapped GPIO controllers.
+
+ This driver also includes support for the following GPIOs:
+ CLPS711X SoCs
+ MOXA ART SoC
+ TS-4800 FPGA DIO blocks and compatibles.
+ GPIOs found on some GE Single Board Computers.
+
Say yes here to support basic platform_device memory-mapped GPIO controllers.

config GPIO_GRGPIO
@@ -286,14 +275,6 @@ config GPIO_MM_LANTIQ
(EBU) found on Lantiq SoCs. The gpios are output only as they are
created by attaching a 16bit latch to the bus.

-config GPIO_MOXART
- bool "MOXART GPIO support"
- depends on ARCH_MOXART || COMPILE_TEST
- select GPIO_GENERIC
- help
- Select this option to enable GPIO driver for
- MOXA ART SoC devices.
-
config GPIO_MPC5200
def_bool y
depends on PPC_MPC52xx
@@ -405,14 +386,6 @@ config GPIO_TEGRA
default y
depends on ARCH_TEGRA || COMPILE_TEST

-config GPIO_TS4800
- tristate "TS-4800 DIO blocks and compatibles"
- depends on OF_GPIO
- depends on SOC_IMX51 || COMPILE_TEST
- select GPIO_GENERIC
- help
- This driver support TS-4800 FPGA GPIO controllers.
-
config GPIO_TZ1090
bool "Toumaz Xenif TZ1090 GPIO support"
depends on SOC_TZ1090
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 991598e..d8d63ae 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -31,7 +31,6 @@ obj-$(CONFIG_GPIO_ATH79) += gpio-ath79.o
obj-$(CONFIG_GPIO_BCM_KONA) += gpio-bcm-kona.o
obj-$(CONFIG_GPIO_BRCMSTB) += gpio-brcmstb.o
obj-$(CONFIG_GPIO_BT8XX) += gpio-bt8xx.o
-obj-$(CONFIG_GPIO_CLPS711X) += gpio-clps711x.o
obj-$(CONFIG_GPIO_CS5535) += gpio-cs5535.o
obj-$(CONFIG_GPIO_CRYSTAL_COVE) += gpio-crystalcove.o
obj-$(CONFIG_GPIO_DA9052) += gpio-da9052.o
@@ -43,7 +42,6 @@ obj-$(CONFIG_GPIO_EM) += gpio-em.o
obj-$(CONFIG_GPIO_EP93XX) += gpio-ep93xx.o
obj-$(CONFIG_GPIO_ETRAXFS) += gpio-etraxfs.o
obj-$(CONFIG_GPIO_F7188X) += gpio-f7188x.o
-obj-$(CONFIG_GPIO_GE_FPGA) += gpio-ge.o
obj-$(CONFIG_GPIO_GRGPIO) += gpio-grgpio.o
obj-$(CONFIG_GPIO_ICH) += gpio-ich.o
obj-$(CONFIG_GPIO_IOP) += gpio-iop.o
@@ -68,7 +66,6 @@ obj-$(CONFIG_GPIO_MC9S08DZ60) += gpio-mc9s08dz60.o
obj-$(CONFIG_GPIO_MCP23S08) += gpio-mcp23s08.o
obj-$(CONFIG_GPIO_ML_IOH) += gpio-ml-ioh.o
obj-$(CONFIG_GPIO_MM_LANTIQ) += gpio-mm-lantiq.o
-obj-$(CONFIG_GPIO_MOXART) += gpio-moxart.o
obj-$(CONFIG_GPIO_MPC5200) += gpio-mpc5200.o
obj-$(CONFIG_GPIO_MPC8XXX) += gpio-mpc8xxx.o
obj-$(CONFIG_GPIO_MSIC) += gpio-msic.o
@@ -107,7 +104,6 @@ obj-$(CONFIG_GPIO_TPS65218) += gpio-tps65218.o
obj-$(CONFIG_GPIO_TPS6586X) += gpio-tps6586x.o
obj-$(CONFIG_GPIO_TPS65910) += gpio-tps65910.o
obj-$(CONFIG_GPIO_TPS65912) += gpio-tps65912.o
-obj-$(CONFIG_GPIO_TS4800) += gpio-ts4800.o
obj-$(CONFIG_GPIO_TS5500) += gpio-ts5500.o
obj-$(CONFIG_GPIO_TWL4030) += gpio-twl4030.o
obj-$(CONFIG_GPIO_TWL6040) += gpio-twl6040.o
diff --git a/drivers/gpio/gpio-clps711x.c b/drivers/gpio/gpio-clps711x.c
deleted file mode 100644
index 5a69025..0000000
--- a/drivers/gpio/gpio-clps711x.c
+++ /dev/null
@@ -1,91 +0,0 @@
-/*
- * CLPS711X GPIO driver
- *
- * Copyright (C) 2012,2013 Alexander Shiyan <***@mail.ru>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#include <linux/err.h>
-#include <linux/module.h>
-#include <linux/gpio/driver.h>
-#include <linux/platform_device.h>
-
-static int clps711x_gpio_probe(struct platform_device *pdev)
-{
- struct device_node *np = pdev->dev.of_node;
- void __iomem *dat, *dir;
- struct gpio_chip *gc;
- struct resource *res;
- int err, id = np ? of_alias_get_id(np, "gpio") : pdev->id;
-
- if ((id < 0) || (id > 4))
- return -ENODEV;
-
- gc = devm_kzalloc(&pdev->dev, sizeof(*gc), GFP_KERNEL);
- if (!gc)
- return -ENOMEM;
-
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- dat = devm_ioremap_resource(&pdev->dev, res);
- if (IS_ERR(dat))
- return PTR_ERR(dat);
-
- res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
- dir = devm_ioremap_resource(&pdev->dev, res);
- if (IS_ERR(dir))
- return PTR_ERR(dir);
-
- switch (id) {
- case 3:
- /* PORTD is inverted logic for direction register */
- err = bgpio_init(gc, &pdev->dev, 1, dat, NULL, NULL,
- NULL, dir, 0);
- break;
- default:
- err = bgpio_init(gc, &pdev->dev, 1, dat, NULL, NULL,
- dir, NULL, 0);
- break;
- }
-
- if (err)
- return err;
-
- switch (id) {
- case 4:
- /* PORTE is 3 lines only */
- gc->ngpio = 3;
- break;
- default:
- break;
- }
-
- gc->base = id * 8;
- gc->owner = THIS_MODULE;
- platform_set_drvdata(pdev, gc);
-
- return devm_gpiochip_add_data(&pdev->dev, gc, NULL);
-}
-
-static const struct of_device_id __maybe_unused clps711x_gpio_ids[] = {
- { .compatible = "cirrus,clps711x-gpio" },
- { }
-};
-MODULE_DEVICE_TABLE(of, clps711x_gpio_ids);
-
-static struct platform_driver clps711x_gpio_driver = {
- .driver = {
- .name = "clps711x-gpio",
- .of_match_table = of_match_ptr(clps711x_gpio_ids),
- },
- .probe = clps711x_gpio_probe,
-};
-module_platform_driver(clps711x_gpio_driver);
-
-MODULE_LICENSE("GPL");
-MODULE_AUTHOR("Alexander Shiyan <***@mail.ru>");
-MODULE_DESCRIPTION("CLPS711X GPIO driver");
-MODULE_ALIAS("platform:clps711x-gpio");
diff --git a/drivers/gpio/gpio-ge.c b/drivers/gpio/gpio-ge.c
deleted file mode 100644
index 8650b29..0000000
--- a/drivers/gpio/gpio-ge.c
+++ /dev/null
@@ -1,114 +0,0 @@
-/*
- * Driver for GE FPGA based GPIO
- *
- * Author: Martyn Welch <***@ge.com>
- *
- * 2008 (c) GE Intelligent Platforms Embedded Systems, Inc.
- *
- * This file is licensed under the terms of the GNU General Public License
- * version 2. This program is licensed "as is" without any warranty of any
- * kind, whether express or implied.
- */
-
-/* TODO
- *
- * Configuration of output modes (totem-pole/open-drain)
- * Interrupt configuration - interrupts are always generated the FPGA relies on
- * the I/O interrupt controllers mask to stop them propergating
- */
-
-#include <linux/kernel.h>
-#include <linux/io.h>
-#include <linux/slab.h>
-#include <linux/of_device.h>
-#include <linux/of_gpio.h>
-#include <linux/of_address.h>
-#include <linux/module.h>
-#include <linux/gpio/driver.h>
-
-#define GEF_GPIO_DIRECT 0x00
-#define GEF_GPIO_IN 0x04
-#define GEF_GPIO_OUT 0x08
-#define GEF_GPIO_TRIG 0x0C
-#define GEF_GPIO_POLAR_A 0x10
-#define GEF_GPIO_POLAR_B 0x14
-#define GEF_GPIO_INT_STAT 0x18
-#define GEF_GPIO_OVERRUN 0x1C
-#define GEF_GPIO_MODE 0x20
-
-static const struct of_device_id gef_gpio_ids[] = {
- {
- .compatible = "gef,sbc610-gpio",
- .data = (void *)19,
- }, {
- .compatible = "gef,sbc310-gpio",
- .data = (void *)6,
- }, {
- .compatible = "ge,imp3a-gpio",
- .data = (void *)16,
- },
- { }
-};
-MODULE_DEVICE_TABLE(of, gef_gpio_ids);
-
-static int __init gef_gpio_probe(struct platform_device *pdev)
-{
- const struct of_device_id *of_id =
- of_match_device(gef_gpio_ids, &pdev->dev);
- struct gpio_chip *gc;
- void __iomem *regs;
- int ret;
-
- gc = devm_kzalloc(&pdev->dev, sizeof(*gc), GFP_KERNEL);
- if (!gc)
- return -ENOMEM;
-
- regs = of_iomap(pdev->dev.of_node, 0);
- if (!regs)
- return -ENOMEM;
-
- ret = bgpio_init(gc, &pdev->dev, 4, regs + GEF_GPIO_IN,
- regs + GEF_GPIO_OUT, NULL, NULL,
- regs + GEF_GPIO_DIRECT, BGPIOF_BIG_ENDIAN_BYTE_ORDER);
- if (ret) {
- dev_err(&pdev->dev, "bgpio_init failed\n");
- goto err0;
- }
-
- /* Setup pointers to chip functions */
- gc->label = devm_kstrdup(&pdev->dev, pdev->dev.of_node->full_name,
- GFP_KERNEL);
- if (!gc->label) {
- ret = -ENOMEM;
- goto err0;
- }
-
- gc->base = -1;
- gc->ngpio = (u16)(uintptr_t)of_id->data;
- gc->of_gpio_n_cells = 2;
- gc->of_node = pdev->dev.of_node;
-
- /* This function adds a memory mapped GPIO chip */
- ret = devm_gpiochip_add_data(&pdev->dev, gc, NULL);
- if (ret)
- goto err0;
-
- return 0;
-err0:
- iounmap(regs);
- pr_err("%s: GPIO chip registration failed\n",
- pdev->dev.of_node->full_name);
- return ret;
-};
-
-static struct platform_driver gef_gpio_driver = {
- .driver = {
- .name = "gef-gpio",
- .of_match_table = gef_gpio_ids,
- },
-};
-module_platform_driver_probe(gef_gpio_driver, gef_gpio_probe);
-
-MODULE_DESCRIPTION("GE I/O FPGA GPIO driver");
-MODULE_AUTHOR("Martyn Welch <***@ge.com");
-MODULE_LICENSE("GPL");
diff --git a/drivers/gpio/gpio-mmio.c b/drivers/gpio/gpio-mmio.c
index 1cfb70a..f116786 100644
--- a/drivers/gpio/gpio-mmio.c
+++ b/drivers/gpio/gpio-mmio.c
@@ -610,10 +610,200 @@ static int bgpio_basic_mmio_parse_dt(struct platform_device *pdev,
return 0;
}

+static int clps711x_parse_dt(struct platform_device *pdev,
+ struct bgpio_pdata *pdata,
+ unsigned long *flags)
+{
+ struct device_node *np = pdev->dev.of_node;
+ struct resource *res;
+ const char *dir_reg_name;
+ int id = np ? of_alias_get_id(np, "gpio") : pdev->id;
+
+ if ((id < 0) || (id > 4))
+ return -ENODEV;
+
+ /* PORTE is 3 lines only */
+ pdata->ngpio = (id == 4) ? 3 : /* determined by register width */ 0;
+
+ /* PORTD is inverted logic for direction register */
+ dir_reg_name = (id == 3) ? "dirin" : "dirout",
+
+ pdata->base = id * 8;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!res)
+ return -EINVAL;
+ if (!res->name || strcmp("dat", res->name))
+ res->name = devm_kstrdup(&pdev->dev, "dat", GFP_KERNEL);
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
+ if (!res)
+ return -EINVAL;
+ if (!res->name || strcmp(dir_reg_name, res->name))
+ res->name = devm_kstrdup(&pdev->dev, dir_reg_name, GFP_KERNEL);
+
+ return 0;
+}
+
+static int ge_dt_cb(struct platform_device *pdev,
+ struct bgpio_pdata *pdata,
+ unsigned long *flags)
+{
+ struct device_node *np = pdev->dev.of_node;
+
+ pdata->label = devm_kstrdup(&pdev->dev, np->full_name, GFP_KERNEL);
+ if (!pdata->label)
+ return -ENOMEM;
+
+ return 0;
+}
+
+static int moxart_dt_cb(struct platform_device *pdev,
+ struct bgpio_pdata *pdata,
+ unsigned long *flags)
+{
+ pdata->base = 0;
+ pdata->label = "moxart-gpio";
+ return 0;
+}
+
+
+static int ts4800_dt_cb(struct platform_device *pdev,
+ struct bgpio_pdata *pdata,
+ unsigned long *flags)
+{
+ int err;
+
+ err = of_property_read_u32(pdev->dev.of_node, "ngpios", &pdata->ngpio);
+ if (err == -EINVAL) {
+ pdata->ngpio = 16;
+ err = 0;
+ }
+ return err;
+}
+
+struct compat_gpio_device_data {
+ unsigned int expected_resource_size;
+ unsigned int ngpio;
+ resource_size_t register_width;
+ unsigned long flags;
+ int (*call_back)(struct platform_device *pdev,
+ struct bgpio_pdata *pdata,
+ unsigned long *flags);
+ struct resource_replacement {
+ resource_size_t start_offset;
+ const char *name;
+ } resources[5];
+};
+
+#define ADD_COMPAT_REGISTER(_name, _offset) \
+ { .name = (_name), .start_offset = (_offset) }
+
+#define ADD_COMPAT_GPIO(_comp, _sz, _ngpio, _width, _cb, _f, _res...) \
+ { .compatible = (_comp), \
+ .data = &(struct compat_gpio_device_data) { \
+ .expected_resource_size = (_sz), \
+ .ngpio = (_ngpio), \
+ .register_width = (_width), \
+ .flags = (_f), \
+ .call_back = (_cb), \
+ .resources = { _res }, \
+ } \
+}
+
+#define ADD_COMPAT_GE_GPIO(_name, _ngpio) \
+ ADD_COMPAT_GPIO(_name, 0x24, _ngpio, 0x4, ge_dt_cb, \
+ BGPIOF_BIG_ENDIAN_BYTE_ORDER, \
+ ADD_COMPAT_REGISTER("dat", 0x04), \
+ ADD_COMPAT_REGISTER("set", 0x08), \
+ ADD_COMPAT_REGISTER("dirin", 0x00)) \
+
+static const struct of_device_id compat_gpio_devices[] = {
+ ADD_COMPAT_GE_GPIO("ge,imp3a-gpio", 16),
+ ADD_COMPAT_GE_GPIO("gef,sbc310-gpio", 6),
+ ADD_COMPAT_GE_GPIO("gef,sbc610-gpio", 19),
+ ADD_COMPAT_GPIO("moxa,moxart-gpio", 0xc, 0, 0x4, moxart_dt_cb,
+ BGPIOF_READ_OUTPUT_REG_SET,
+ ADD_COMPAT_REGISTER("dat", 0x04),
+ ADD_COMPAT_REGISTER("set", 0x00),
+ ADD_COMPAT_REGISTER("dirout", 0x08)),
+ ADD_COMPAT_GPIO("technologic,ts4800-gpio", 0x6, 16, 0x2, ts4800_dt_cb,
+ 0, ADD_COMPAT_REGISTER("dat", 0x00),
+ ADD_COMPAT_REGISTER("set", 0x02),
+ ADD_COMPAT_REGISTER("dirout", 0x04)),
+};
+
+#undef ADD_COMPAT_GE_GPIO
+#undef ADD_COMPAT_GPIO
+#undef ADD_COMPAT_REGISTER
+
+static int compat_parse_dt(struct platform_device *pdev,
+ struct bgpio_pdata *pdata,
+ unsigned long *flags)
+{
+ const struct device_node *node = pdev->dev.of_node;
+ const struct compat_gpio_device_data *entry;
+ const struct of_device_id *of_id;
+ struct resource *res;
+ int err;
+
+ of_id = of_match_node(compat_gpio_devices, node);
+ if (!of_id)
+ return -ENODEV;
+
+ entry = of_id->data;
+ if (!entry || !entry->resources[0].name)
+ return -EINVAL;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!res)
+ return -EINVAL;
+
+ if (!res->name || strcmp(entry->resources[0].name, res->name)) {
+ struct resource nres[ARRAY_SIZE(entry->resources)];
+ int i;
+
+ if (resource_size(res) != entry->expected_resource_size)
+ return -EINVAL;
+
+ for (i = 0; i < ARRAY_SIZE(entry->resources); i++) {
+ if (!entry->resources[i].name)
+ continue;
+
+ nres[i].name = devm_kstrdup(&pdev->dev,
+ entry->resources[i].name, GFP_KERNEL);
+ nres[i].start = res->start +
+ entry->resources[i].start_offset;
+ nres[i].end = nres[i].start +
+ entry->register_width - 1;
+ nres[i].flags = IORESOURCE_MEM;
+ }
+
+ err = platform_device_add_resources(pdev, nres, i);
+ if (err)
+ return err;
+ }
+
+ pdata->base = -1;
+ pdata->ngpio = entry->ngpio;
+ *flags = entry->flags;
+
+ if (entry->call_back)
+ err = entry->call_back(pdev, pdata, flags);
+
+ return err;
+}
+
#define ADD(_name, _func) { .compatible = _name, .data = _func }

static const struct of_device_id bgpio_of_match[] = {
ADD("wd,mbl-gpio", bgpio_basic_mmio_parse_dt),
+ ADD("cirrus,clps711x-gpio", clps711x_parse_dt),
+ ADD("ge,imp3a-gpio", compat_parse_dt),
+ ADD("gef,sbc310-gpio", compat_parse_dt),
+ ADD("gef,sbc610-gpio", compat_parse_dt),
+ ADD("moxa,moxart-gpio", compat_parse_dt),
+ ADD("technologic,ts4800-gpio", compat_parse_dt),
{ }
};
#undef ADD
diff --git a/drivers/gpio/gpio-moxart.c b/drivers/gpio/gpio-moxart.c
deleted file mode 100644
index d58d389..0000000
--- a/drivers/gpio/gpio-moxart.c
+++ /dev/null
@@ -1,84 +0,0 @@
-/*
- * MOXA ART SoCs GPIO driver.
- *
- * Copyright (C) 2013 Jonas Jensen
- *
- * Jonas Jensen <***@gmail.com>
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#include <linux/err.h>
-#include <linux/init.h>
-#include <linux/irq.h>
-#include <linux/io.h>
-#include <linux/platform_device.h>
-#include <linux/of_address.h>
-#include <linux/of_gpio.h>
-#include <linux/pinctrl/consumer.h>
-#include <linux/delay.h>
-#include <linux/timer.h>
-#include <linux/bitops.h>
-#include <linux/gpio/driver.h>
-
-#define GPIO_DATA_OUT 0x00
-#define GPIO_DATA_IN 0x04
-#define GPIO_PIN_DIRECTION 0x08
-
-static int moxart_gpio_probe(struct platform_device *pdev)
-{
- struct device *dev = &pdev->dev;
- struct resource *res;
- struct gpio_chip *gc;
- void __iomem *base;
- int ret;
-
- gc = devm_kzalloc(dev, sizeof(*gc), GFP_KERNEL);
- if (!gc)
- return -ENOMEM;
-
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- base = devm_ioremap_resource(dev, res);
- if (IS_ERR(base))
- return PTR_ERR(base);
-
- ret = bgpio_init(gc, dev, 4, base + GPIO_DATA_IN,
- base + GPIO_DATA_OUT, NULL,
- base + GPIO_PIN_DIRECTION, NULL,
- BGPIOF_READ_OUTPUT_REG_SET);
- if (ret) {
- dev_err(&pdev->dev, "bgpio_init failed\n");
- return ret;
- }
-
- gc->label = "moxart-gpio";
- gc->request = gpiochip_generic_request;
- gc->free = gpiochip_generic_free;
- gc->base = 0;
- gc->owner = THIS_MODULE;
-
- ret = devm_gpiochip_add_data(dev, gc, NULL);
- if (ret) {
- dev_err(dev, "%s: gpiochip_add failed\n",
- dev->of_node->full_name);
- return ret;
- }
-
- return ret;
-}
-
-static const struct of_device_id moxart_gpio_match[] = {
- { .compatible = "moxa,moxart-gpio" },
- { }
-};
-
-static struct platform_driver moxart_gpio_driver = {
- .driver = {
- .name = "moxart-gpio",
- .of_match_table = moxart_gpio_match,
- },
- .probe = moxart_gpio_probe,
-};
-builtin_platform_driver(moxart_gpio_driver);
diff --git a/drivers/gpio/gpio-ts4800.c b/drivers/gpio/gpio-ts4800.c
deleted file mode 100644
index 0c144a7..0000000
--- a/drivers/gpio/gpio-ts4800.c
+++ /dev/null
@@ -1,81 +0,0 @@
-/*
- * GPIO driver for the TS-4800 board
- *
- * Copyright (c) 2016 - Savoir-faire Linux
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#include <linux/gpio/driver.h>
-#include <linux/of_address.h>
-#include <linux/of_device.h>
-#include <linux/platform_device.h>
-
-#define DEFAULT_PIN_NUMBER 16
-#define INPUT_REG_OFFSET 0x00
-#define OUTPUT_REG_OFFSET 0x02
-#define DIRECTION_REG_OFFSET 0x04
-
-static int ts4800_gpio_probe(struct platform_device *pdev)
-{
- struct device_node *node;
- struct gpio_chip *chip;
- struct resource *res;
- void __iomem *base_addr;
- int retval;
- u32 ngpios;
-
- chip = devm_kzalloc(&pdev->dev, sizeof(struct gpio_chip), GFP_KERNEL);
- if (!chip)
- return -ENOMEM;
-
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- base_addr = devm_ioremap_resource(&pdev->dev, res);
- if (IS_ERR(base_addr))
- return PTR_ERR(base_addr);
-
- node = pdev->dev.of_node;
- if (!node)
- return -EINVAL;
-
- retval = of_property_read_u32(node, "ngpios", &ngpios);
- if (retval == -EINVAL)
- ngpios = DEFAULT_PIN_NUMBER;
- else if (retval)
- return retval;
-
- retval = bgpio_init(chip, &pdev->dev, 2, base_addr + INPUT_REG_OFFSET,
- base_addr + OUTPUT_REG_OFFSET, NULL,
- base_addr + DIRECTION_REG_OFFSET, NULL, 0);
- if (retval) {
- dev_err(&pdev->dev, "bgpio_init failed\n");
- return retval;
- }
-
- chip->ngpio = ngpios;
-
- platform_set_drvdata(pdev, chip);
-
- return devm_gpiochip_add_data(&pdev->dev, chip, NULL);
-}
-
-static const struct of_device_id ts4800_gpio_of_match[] = {
- { .compatible = "technologic,ts4800-gpio", },
- {},
-};
-
-static struct platform_driver ts4800_gpio_driver = {
- .driver = {
- .name = "ts4800-gpio",
- .of_match_table = ts4800_gpio_of_match,
- },
- .probe = ts4800_gpio_probe,
-};
-
-module_platform_driver_probe(ts4800_gpio_driver, ts4800_gpio_probe);
-
-MODULE_AUTHOR("Julien Grossholtz <***@savoirfairelinux.com>");
-MODULE_DESCRIPTION("TS4800 FPGA GPIO driver");
-MODULE_LICENSE("GPL v2");
--
2.8.1
Christian Lamparter
2016-05-01 12:18:37 UTC
Permalink
This patch adds the device tree bindings for the Western Digital's
MyBook Live memory-mapped GPIO controllers.

The gpios will be supported by gpio-mmio code of the
GPIO generic library.

Signed-off-by: Christian Lamparter <***@googlemail.com>
---
.../devicetree/bindings/gpio/wd,mbl-gpio.txt | 38 ++++++++++++++++++++++
1 file changed, 38 insertions(+)
create mode 100644 Documentation/devicetree/bindings/gpio/wd,mbl-gpio.txt

diff --git a/Documentation/devicetree/bindings/gpio/wd,mbl-gpio.txt b/Documentation/devicetree/bindings/gpio/wd,mbl-gpio.txt
new file mode 100644
index 0000000..038c3a6
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/wd,mbl-gpio.txt
@@ -0,0 +1,38 @@
+Bindings for the Western Digital's MyBook Live memory-mapped GPIO controllers.
+
+The Western Digital MyBook Live has two memory-mapped GPIO controllers.
+Both GPIO controller only have a single 8-bit data register, where GPIO
+state can be read and/or written.
+
+Required properties:
+ - compatible: should be "wd,mbl-gpio"
+ - reg-names: must contain
+ "dat" - data register
+ - reg: address + size pairs describing the GPIO register sets;
+ order must correspond with the order of entries in reg-names
+ - #gpio-cells: must be set to 2. The first cell is the pin number and
+ the second cell is used to specify the gpio polarity:
+ 0 = active high
+ 1 = active low
+ - gpio-controller: Marks the device node as a gpio controller.
+
+Optional properties:
+ - no-output: GPIOs are read-only.
+
+Examples:
+ gpio0: ***@e0000000 {
+ compatible = "wd,mbl-gpio";
+ reg-names = "dat";
+ reg = <0xe0000000 0x1>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ };
+
+ gpio1: ***@e0100000 {
+ compatible = "wd,mbl-gpio";
+ reg-names = "dat";
+ reg = <0xe0100000 0x1>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ no-output;
+ };
--
2.8.1
Rob Herring
2016-05-04 02:22:10 UTC
Permalink
Post by Christian Lamparter
This patch adds the device tree bindings for the Western Digital's
MyBook Live memory-mapped GPIO controllers.
The gpios will be supported by gpio-mmio code of the
GPIO generic library.
---
.../devicetree/bindings/gpio/wd,mbl-gpio.txt | 38 ++++++++++++++++++++++
1 file changed, 38 insertions(+)
create mode 100644 Documentation/devicetree/bindings/gpio/wd,mbl-gpio.txt
diff --git a/Documentation/devicetree/bindings/gpio/wd,mbl-gpio.txt b/Documentation/devicetree/bindings/gpio/wd,mbl-gpio.txt
new file mode 100644
index 0000000..038c3a6
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/wd,mbl-gpio.txt
@@ -0,0 +1,38 @@
+Bindings for the Western Digital's MyBook Live memory-mapped GPIO controllers.
Are these really product level GPIOs rather than some SOC's GPIOs
(APM?)?
Post by Christian Lamparter
+
+The Western Digital MyBook Live has two memory-mapped GPIO controllers.
+Both GPIO controller only have a single 8-bit data register, where GPIO
+state can be read and/or written.
+
+ - compatible: should be "wd,mbl-gpio"
+ - reg-names: must contain
+ "dat" - data register
+ - reg: address + size pairs describing the GPIO register sets;
+ order must correspond with the order of entries in reg-names
+ - #gpio-cells: must be set to 2. The first cell is the pin number and
+ 0 = active high
+ 1 = active low
+ - gpio-controller: Marks the device node as a gpio controller.
+
+ - no-output: GPIOs are read-only.
+
+ compatible = "wd,mbl-gpio";
+ reg-names = "dat";
+ reg = <0xe0000000 0x1>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ };
+
+ compatible = "wd,mbl-gpio";
+ reg-names = "dat";
+ reg = <0xe0100000 0x1>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ no-output;
+ };
--
2.8.1
Christian Lamparter
2016-05-04 04:53:50 UTC
Permalink
Post by Rob Herring
Post by Christian Lamparter
This patch adds the device tree bindings for the Western Digital's
MyBook Live memory-mapped GPIO controllers.
The gpios will be supported by gpio-mmio code of the
GPIO generic library.
+++ b/Documentation/devicetree/bindings/gpio/wd,mbl-gpio.txt
@@ -0,0 +1,38 @@
+Bindings for the Western Digital's MyBook Live memory-mapped GPIO controllers.
Are these really product level GPIOs rather than some SOC's GPIOs
(APM?)?
Ah, that's a good point.

In a nutshell: The APM82181 SoC has two proper/normal GPIO controllers
which have a dt-binding and a kernel driver ready to go.
However Western Digital went with their own GPIO controller for
the MyBook Live [7].

Long version:
I know this SoC does have proper GPIO controllers [0].
For reference: I've helped making a OpenWRT port for the Cisco Meraki MR24
which uses it/them [1], [2]. Here's the GPIO extract from the MR24 DTS [3]:

--- MR24 DTS ---
GPIO0: ***@ef600b00 {
compatible = "ibm,ppc4xx-gpio";
reg = <0xef600b00 0x00000048>;
#gpio-cells = <2>;
gpio-controller;
};
--- snap ---

The driver for the "ibm,ppc4xx-gpio" is located under:
arch/powerpc/sysdev/ppc4xx_gpio.c [4].
I can't find a dt binding text for it, if you want I can write one >later<.
The "ppc4xx" moniker is a strong indication that these GPIO controllers
were carried over from the ppc46x/44x/40x series.
The address (but not the range): 0x00000004 ef600b00 does match with the
System Memory Map of the PPC460EX (See GPIO0 Controller on page 8 [5]).

Now for the MyBook Live: The GPIO situation is completely different.
Unlike the MR24, there are two GPIOs. The first one is on address
0x4e0000000. It drives the 3-color LED, Ethernet PHY Reset, USB-Core Power,
SATA Port0 and Port1 Power, NOR Flash Switch and the reset button driver.

The second GPIO only has one input connected. It BIT2 represents the state
of the reset button. It is located at 0x4e0100000. (The 0x4e0xxxxx address
puts the GPIO devices on the EBC (aka External Peripheral Bus Controller).
The EBC is normally used for "direct attachment of memory devices such as
ROM, SRAM, ...")

Western Digital did release their version of the GPIO driver: apollo3g-gpio.c
as part of their GPL sources [6]. (I found a mostly untouched version of the
apollo3g-gpio.c driver on github [7] (AFAICT he added the "porting to kernel
3.2.64 by ***@..." string, other than that it should be pretty much
identical to what's inside the GPL.tar.gz).

So, I think the MyBook Live's GPIO controller is definitively something WD
cooked up by themselves in their labs. But I have no idea why they didn't
use the SoC's GPIO like Cisco... But sadly they really didn't...

Note:
If someone wants to look and play with this curiosity. I have a small
stack of DIY "MyBook Live kits", so I can sent one or two away easily.
For assembling a kit: one need a working 3.5" SATA HDD and a 12v 1.25A
PSU with a standard 5.5mm x 2.1mm power jack. I made a Debian image for
development (download). So, if someone is interested: PM me.

Regards,
Christian

[0] <https://c1170156.ssl.cf3.rackcdn.com/UK_AMC_APM82181-SKE1000T_DS.pdf>
[1] <https://wikidevi.com/wiki/Cisco_Meraki_MR24>
[2] <https://forum.openwrt.org/viewtopic.php?pid=316793#p316793>
[3] <https://github.com/riptidewave93/Openwrt-MR24/blob/master/overlay/target/linux/apm821xx/dts/MR24.dts#L251>
[4] <https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/arch/powerpc/sysdev/ppc4xx_gpio.c>
[5] <http://datasheet.octopart.com/PPC460EX-NUB800T-AMCC-datasheet-11553412.pdf>
[6] <http://support.wdc.com/downloads.aspx?p=132&lang=en>
[7] <https://github.com/MyBookLive/kernel-4.0.x/blob/master/03_enable_leds.patch>
Post by Rob Herring
+The Western Digital MyBook Live has two memory-mapped GPIO controllers.
+Both GPIO controller only have a single 8-bit data register, where GPIO
+state can be read and/or written.
+
+ - compatible: should be "wd,mbl-gpio"
+ - reg-names: must contain
+ "dat" - data register
+ - reg: address + size pairs describing the GPIO register sets;
+ order must correspond with the order of entries in reg-names
+ - #gpio-cells: must be set to 2. The first cell is the pin number and
+ 0 = active high
+ 1 = active low
+ - gpio-controller: Marks the device node as a gpio controller.
+
+ - no-output: GPIOs are read-only.
+
+ compatible = "wd,mbl-gpio";
+ reg-names = "dat";
+ reg = <0xe0000000 0x1>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ };
+
+ compatible = "wd,mbl-gpio";
+ reg-names = "dat";
+ reg = <0xe0100000 0x1>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ no-output;
+ };
--
2.8.1
Rob Herring
2016-05-04 12:32:02 UTC
Permalink
On Tue, May 3, 2016 at 11:53 PM, Christian Lamparter
Post by Christian Lamparter
Post by Rob Herring
Post by Christian Lamparter
This patch adds the device tree bindings for the Western Digital's
MyBook Live memory-mapped GPIO controllers.
The gpios will be supported by gpio-mmio code of the
GPIO generic library.
+++ b/Documentation/devicetree/bindings/gpio/wd,mbl-gpio.txt
@@ -0,0 +1,38 @@
+Bindings for the Western Digital's MyBook Live memory-mapped GPIO controllers.
Are these really product level GPIOs rather than some SOC's GPIOs
(APM?)?
Ah, that's a good point.
In a nutshell: The APM82181 SoC has two proper/normal GPIO controllers
which have a dt-binding and a kernel driver ready to go.
However Western Digital went with their own GPIO controller for
the MyBook Live [7].
Okay, just making sure. It's a little strange to have external (to an
SOC) memory mapped GPIOs is why I asked.

Acked-by: Rob Herring <***@kernel.org>

Rob

P.S. By v6, you should drop RFC.

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