Discussion:
[PATCH 0/2] ARM: OMAP2+: Fix errors in PRCM hwmods + wrong clkdm
(too old to reply)
Benoit Cousson
2012-06-11 16:47:03 UTC
Permalink
Hi Paul,

Here is the serie to fix wrong clkdm for the PRCM hwmods.

I did revert as well the patch to make the cm_clkdm and prm_clkdm
common since it does not exist on OMAP4.
I do not thinks it exists in OMAP2 and 3 either, and thus that series should
probably be extended with the total removal of these fake clkdm.
I'd like to get your feedback first on this one to go further for OMAP2 & 3.

This series is based on 3.5-rc2 and should target -rc3.

Regards,
Benoit


Benoit Cousson (2):
ARM: OMAP2+: hwmod data: Fix the wrong clkdm assigned to PRCM modules
Revert "ARM: OMAP2+: clockdomains: make {prm,cm}_clkdm common"

arch/arm/mach-omap2/Makefile | 1 -
arch/arm/mach-omap2/clockdomain44xx.c | 6 ---
arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c | 10 ++++
arch/arm/mach-omap2/clockdomains44xx_data.c | 2 -
arch/arm/mach-omap2/clockdomains_common_data.c | 24 ----------
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 52 +++++++++++-----------
6 files changed, 36 insertions(+), 59 deletions(-)
delete mode 100644 arch/arm/mach-omap2/clockdomains_common_data.c

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Benoit Cousson
2012-06-11 16:47:04 UTC
Permalink
The following commit (794b480a37e3d284d6ee7344d8a737ef60476ed5) was adding
the PRCM IPs data for PRCM, CM, PRCM_MPU and SCRM.
The clkdm entry are not the correct ones and does not exist in the system.

Replace them with the proper wkup, l4_ao and l4_cfg.

Fix as well the wrong OCP port used by the cm_core_aon. It uses the
l4_cfg interconnect and not the l4_wkup.

Re-order the entries by address value.

Signed-off-by: Benoit Cousson <b-***@ti.com>
---
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 52 ++++++++++++++--------------
1 files changed, 26 insertions(+), 26 deletions(-)

diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 950454a..03fc705 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -2529,27 +2529,6 @@ static struct omap_hwmod_class omap44xx_prcm_hwmod_class = {
.name = "prcm",
};

-/* prcm_mpu */
-static struct omap_hwmod omap44xx_prcm_mpu_hwmod = {
- .name = "prcm_mpu",
- .class = &omap44xx_prcm_hwmod_class,
- .clkdm_name = "l4_wkup_clkdm",
-};
-
-/* cm_core_aon */
-static struct omap_hwmod omap44xx_cm_core_aon_hwmod = {
- .name = "cm_core_aon",
- .class = &omap44xx_prcm_hwmod_class,
- .clkdm_name = "cm_clkdm",
-};
-
-/* cm_core */
-static struct omap_hwmod omap44xx_cm_core_hwmod = {
- .name = "cm_core",
- .class = &omap44xx_prcm_hwmod_class,
- .clkdm_name = "cm_clkdm",
-};
-
/* prm */
static struct omap_hwmod_irq_info omap44xx_prm_irqs[] = {
{ .irq = 11 + OMAP44XX_IRQ_GIC_START },
@@ -2564,12 +2543,33 @@ static struct omap_hwmod_rst_info omap44xx_prm_resets[] = {
static struct omap_hwmod omap44xx_prm_hwmod = {
.name = "prm",
.class = &omap44xx_prcm_hwmod_class,
- .clkdm_name = "prm_clkdm",
+ .clkdm_name = "l4_wkup_clkdm",
.mpu_irqs = omap44xx_prm_irqs,
.rst_lines = omap44xx_prm_resets,
.rst_lines_cnt = ARRAY_SIZE(omap44xx_prm_resets),
};

+/* cm_core */
+static struct omap_hwmod omap44xx_cm_core_hwmod = {
+ .name = "cm_core",
+ .class = &omap44xx_prcm_hwmod_class,
+ .clkdm_name = "l4_cfg_clkdm",
+};
+
+/* cm_core_aon */
+static struct omap_hwmod omap44xx_cm_core_aon_hwmod = {
+ .name = "cm_core_aon",
+ .class = &omap44xx_prcm_hwmod_class,
+ .clkdm_name = "l4_ao_clkdm",
+};
+
+/* prcm_mpu */
+static struct omap_hwmod omap44xx_prcm_mpu_hwmod = {
+ .name = "prcm_mpu",
+ .class = &omap44xx_prcm_hwmod_class,
+ .clkdm_name = "l4_wkup_clkdm",
+};
+
/*
* 'scrm' class
* system clock and reset manager
@@ -5305,10 +5305,10 @@ static struct omap_hwmod_addr_space omap44xx_cm_core_aon_addrs[] = {
};

/* l4_wkup -> cm_core_aon */
-static struct omap_hwmod_ocp_if omap44xx_l4_wkup__cm_core_aon = {
- .master = &omap44xx_l4_wkup_hwmod,
+static struct omap_hwmod_ocp_if omap44xx_l4_cfg__cm_core_aon = {
+ .master = &omap44xx_l4_cfg_hwmod,
.slave = &omap44xx_cm_core_aon_hwmod,
- .clk = "l4_wkup_clk_mux_ck",
+ .clk = "l4_div_ck",
.addr = omap44xx_cm_core_aon_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
@@ -6101,7 +6101,7 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
&omap44xx_l3_main_2__ocmc_ram,
&omap44xx_l4_cfg__ocp2scp_usb_phy,
&omap44xx_mpu_private__prcm_mpu,
- &omap44xx_l4_wkup__cm_core_aon,
+ &omap44xx_l4_cfg__cm_core_aon,
&omap44xx_l4_cfg__cm_core,
&omap44xx_l4_wkup__prm,
&omap44xx_l4_wkup__scrm,
--
1.7.0.4

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Paul Walmsley
2012-06-11 17:26:35 UTC
Permalink
Post by Benoit Cousson
The following commit (794b480a37e3d284d6ee7344d8a737ef60476ed5) was adding
the PRCM IPs data for PRCM, CM, PRCM_MPU and SCRM.
The clkdm entry are not the correct ones and does not exist in the system.
Replace them with the proper wkup, l4_ao and l4_cfg.
This does not match either the publicly avaiable documentation and the
internal NDA hardware specifications[1].

Nor does it make sense from a logical perspective. To take an example
Post by Benoit Cousson
@@ -2564,12 +2543,33 @@ static struct omap_hwmod_rst_info omap44xx_prm_resets[] = {
static struct omap_hwmod omap44xx_prm_hwmod = {
.name = "prm",
.class = &omap44xx_prcm_hwmod_class,
- .clkdm_name = "prm_clkdm",
+ .clkdm_name = "l4_wkup_clkdm",
.mpu_irqs = omap44xx_prm_irqs,
.rst_lines = omap44xx_prm_resets,
.rst_lines_cnt = ARRAY_SIZE(omap44xx_prm_resets),
};
There is no possible way that the PRM can exist in the L4_WKUP
clockdomain. The L4_WKUP clockdomain must be able to go inactive for the
chip to enter idle, as we just discussed[1]. But the PRM is the
entity that supervises chip wakeup from off-mode, so for off-mode
to work, there's no way that the PRM can be clock-gated.

Frustrating :-(
Post by Benoit Cousson
Fix as well the wrong OCP port used by the cm_core_aon. It uses the
l4_cfg interconnect and not the l4_wkup.
Re-order the entries by address value.
If you split this part off into a separate patch, I'll take it.


- Paul

1. Cousson, Benoît. _Re: [PATCH] ARM: OMAP2+: hwmod code/data: fix 32K
sync timer_. linux-***@vger.kernel.org mailing list. Available from
http://www.spinics.net/lists/arm-kernel/msg177128.html (among others).
Cousson, Benoit
2012-06-11 21:11:46 UTC
Permalink
The following commit (794b480a37e3d284d6ee7344d8a737ef60476ed5) was =
adding
the PRCM IPs data for PRCM, CM, PRCM_MPU and SCRM.
The clkdm entry are not the correct ones and does not exist in the s=
ystem.
Replace them with the proper wkup, l4_ao and l4_cfg.
This does not match either the publicly avaiable documentation and th=
e
internal NDA hardware specifications[1].
That's almost true, until I realized that the clock domain modules list=
=20
contain this information (clock.py/clock_domain['l4_wkup']['modules']).
Now, I'm wondering as well why this is not documented better. I'll chec=
k=20
that tomorrow.
Nor does it make sense from a logical perspective.
I do think it does.
@@ -2564,12 +2543,33 @@ static struct omap_hwmod_rst_info omap44xx_p=
rm_resets[] =3D {
static struct omap_hwmod omap44xx_prm_hwmod =3D {
.name =3D "prm",
.class =3D &omap44xx_prcm_hwmod_class,
- .clkdm_name =3D "prm_clkdm",
+ .clkdm_name =3D "l4_wkup_clkdm",
.mpu_irqs =3D omap44xx_prm_irqs,
.rst_lines =3D omap44xx_prm_resets,
.rst_lines_cnt =3D ARRAY_SIZE(omap44xx_prm_resets),
};
There is no possible way that the PRM can exist in the L4_WKUP
clockdomain. The L4_WKUP clockdomain must be able to go inactive for=
the
chip to enter idle, as we just discussed[1]. But the PRM is the
entity that supervises chip wakeup from off-mode, so for off-mode
to work, there's no way that the PRM can be clock-gated.
OK, so let's replace PRM by GPT1, without the part that is not=20
applicable in that case:

"There is no possible way that the GPT1 can exist in the L4_WKUP=20
clockdomain. The L4_WKUP clockdomain must be able to go inactive for th=
e
chip to enter idle, as we just discussed[1] ... so for off-mode
to work, there's no way that the GPT1 can be clock-gated."

Don't you think that this sentence looks wrong now?
Why can the GPT1 run during OFF mode and not the PRM?

The wkup domain is far from being a standard domain. The 32k is always=20
running even in OFF mode. So for the same reason, that domain can go to=
=20
inactive without gating the 32k. This is clearly not a standard domain=20
but that does not make it a bad one either.

All the IPs that belongs to the l4_wkup are all active during OFF mode,=
=20
so is the PRM. The point discussed in [1] clearly show that the domain=20
inactive state in the case of the wakeup is just used for the OCP clock=
=2E=20
The functional 32k is still active during OFF mode.
Frustrating :-(
You should not, I'm happy we were able to figured out where these PRCM=20
IPs are located after all these years :-)
Fix as well the wrong OCP port used by the cm_core_aon. It uses the
l4_cfg interconnect and not the l4_wkup.
Re-order the entries by address value.
If you split this part off into a separate patch, I'll take it.
You should take both since this patch is perfectly valid as explained=20
previously.

cm_clkdm does not exist either whereas l4_aon / l4_cfg does. And=20
honestly considering that the core_cm_aon is inside a domain names=20
l4_aon does not seems stupid at all.

The more or less accurate definition of the PRCM clock domain since eve=
r=20
is that a domain is mostly a group of IPs and the related clocks that=20
does belong to the same interconnect. So it makes sense that the cm_cor=
e=20
(CM2), cm_core_aon (CM1) and prm does belong to the domain that contain=
s=20
its respective interconnect.

Regards,
Benoit
- Paul
1. Cousson, Beno=EEt. _Re: [PATCH] ARM: OMAP2+: hwmod code/data: fix=
32K
from
http://www.spinics.net/lists/arm-kernel/msg177128.html (among oth=
ers).
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Cousson, Benoit
2012-06-12 12:38:31 UTC
Permalink
Hi Paul,
Post by Cousson, Benoit
Post by Paul Walmsley
Post by Benoit Cousson
The following commit (794b480a37e3d284d6ee7344d8a737ef60476ed5) was adding
the PRCM IPs data for PRCM, CM, PRCM_MPU and SCRM.
The clkdm entry are not the correct ones and does not exist in the system.
Replace them with the proper wkup, l4_ao and l4_cfg.
This does not match either the publicly avaiable documentation and the
internal NDA hardware specifications[1].
That's almost true, until I realized that the clock domain modules list
contain this information (clock.py/clock_domain['l4_wkup']['modules']).
Now, I'm wondering as well why this is not documented better. I'll check
that tomorrow.
OK, I've just spent 2 hours with HW folks trying to get the real truth...

In fact, this information is not even accurate :-(

There is no such thing as clock domain for PRCM IPs. These IPs are
considered as clock generator or reset generator and thus does not
belong to any clock domain.
This information was used to capture the power domain where they belong
and thus the closest clock domain was used for that, but this is purely
artificial.

Their first question was, why do you guys need that at the first place???

I guess this question is valid. Since we do not have any SW control,
this information is completely useless except to potentially avoid
de-referencing null clkdm.

So I guess it is much better to just take care of that and avoid
populating with wrong or fake clock domains.

Going a little bit further, these IPs do not even have modulemode, or
whatever SW control. Even the hwmod it not applicable for them. It
should just be a regular platform_device and thus deserve a simple entry
in DT without any hwmod attribute.

Bottom-line, I think we should simply get rid of these PRCM hwmod
entries and the corresponding fake clock domains.

Does that make sense to you?

Regards,
Benoit

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Paul Walmsley
2012-06-13 23:43:52 UTC
Permalink
Benoît and I discussed this today, at length. Our views still differ.

In an attempt to move on to more useful work, a compromise was agreed.
The following patch removes the requirement for hwmods to have a
clkdm_name, and removes the PRM and CM clockdomains from the data.
It is intended for 3.6.


- Paul

From: Paul Walmsley <***@pwsan.com>
Date: Wed, 13 Jun 2012 17:16:05 -0600
Subject: [PATCH] ARM: OMAP2+: hwmod: remove prm_clkdm, cm_clkdm; allow hwmods
to have no clockdomain

Remove prm_clkdm and cm_clkdm and allow hwmods to have no clockdomain.

Signed-off-by: Paul Walmsley <***@pwsan.com>
Cc: Benoît Cousson <b-***@ti.com>
---
arch/arm/mach-omap2/Makefile | 1 -
arch/arm/mach-omap2/clockdomain.h | 2 --
arch/arm/mach-omap2/clockdomains2420_data.c | 2 --
arch/arm/mach-omap2/clockdomains2430_data.c | 2 --
arch/arm/mach-omap2/clockdomains3xxx_data.c | 2 --
arch/arm/mach-omap2/clockdomains44xx_data.c | 2 --
arch/arm/mach-omap2/clockdomains_common_data.c | 24 ------------------------
arch/arm/mach-omap2/omap_hwmod.c | 9 ++++-----
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 3 ---
9 files changed, 4 insertions(+), 43 deletions(-)
delete mode 100644 arch/arm/mach-omap2/clockdomains_common_data.c

diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index fa742f3..bc7d239 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -116,7 +116,6 @@ obj-$(CONFIG_ARCH_OMAP4) += powerdomains44xx_data.o

# PRCM clockdomain control
clockdomain-common += clockdomain.o
-clockdomain-common += clockdomains_common_data.o
obj-$(CONFIG_ARCH_OMAP2) += $(clockdomain-common)
obj-$(CONFIG_ARCH_OMAP2) += clockdomain2xxx_3xxx.o
obj-$(CONFIG_ARCH_OMAP2) += clockdomains2xxx_3xxx_data.o
diff --git a/arch/arm/mach-omap2/clockdomain.h b/arch/arm/mach-omap2/clockdomain.h
index f7b5860..349dcbb 100644
--- a/arch/arm/mach-omap2/clockdomain.h
+++ b/arch/arm/mach-omap2/clockdomain.h
@@ -206,7 +206,5 @@ extern struct clkdm_ops omap4_clkdm_operations;
extern struct clkdm_dep gfx_24xx_wkdeps[];
extern struct clkdm_dep dsp_24xx_wkdeps[];
extern struct clockdomain wkup_common_clkdm;
-extern struct clockdomain prm_common_clkdm;
-extern struct clockdomain cm_common_clkdm;

#endif
diff --git a/arch/arm/mach-omap2/clockdomains2420_data.c b/arch/arm/mach-omap2/clockdomains2420_data.c
index 0ab8e46..5c74185 100644
--- a/arch/arm/mach-omap2/clockdomains2420_data.c
+++ b/arch/arm/mach-omap2/clockdomains2420_data.c
@@ -131,8 +131,6 @@ static struct clockdomain dss_2420_clkdm = {

static struct clockdomain *clockdomains_omap242x[] __initdata = {
&wkup_common_clkdm,
- &cm_common_clkdm,
- &prm_common_clkdm,
&mpu_2420_clkdm,
&iva1_2420_clkdm,
&dsp_2420_clkdm,
diff --git a/arch/arm/mach-omap2/clockdomains2430_data.c b/arch/arm/mach-omap2/clockdomains2430_data.c
index 3645ed0..f096175 100644
--- a/arch/arm/mach-omap2/clockdomains2430_data.c
+++ b/arch/arm/mach-omap2/clockdomains2430_data.c
@@ -157,8 +157,6 @@ static struct clockdomain dss_2430_clkdm = {

static struct clockdomain *clockdomains_omap243x[] __initdata = {
&wkup_common_clkdm,
- &cm_common_clkdm,
- &prm_common_clkdm,
&mpu_2430_clkdm,
&mdm_clkdm,
&dsp_2430_clkdm,
diff --git a/arch/arm/mach-omap2/clockdomains3xxx_data.c b/arch/arm/mach-omap2/clockdomains3xxx_data.c
index 6038adb..2cdc17c 100644
--- a/arch/arm/mach-omap2/clockdomains3xxx_data.c
+++ b/arch/arm/mach-omap2/clockdomains3xxx_data.c
@@ -347,8 +347,6 @@ static struct clkdm_autodep clkdm_autodeps[] = {

static struct clockdomain *clockdomains_omap3430_common[] __initdata = {
&wkup_common_clkdm,
- &cm_common_clkdm,
- &prm_common_clkdm,
&mpu_3xxx_clkdm,
&neon_clkdm,
&iva2_clkdm,
diff --git a/arch/arm/mach-omap2/clockdomains44xx_data.c b/arch/arm/mach-omap2/clockdomains44xx_data.c
index c534258..bd7ed13 100644
--- a/arch/arm/mach-omap2/clockdomains44xx_data.c
+++ b/arch/arm/mach-omap2/clockdomains44xx_data.c
@@ -430,8 +430,6 @@ static struct clockdomain *clockdomains_omap44xx[] __initdata = {
&l4_wkup_44xx_clkdm,
&emu_sys_44xx_clkdm,
&l3_dma_44xx_clkdm,
- &prm_common_clkdm,
- &cm_common_clkdm,
NULL
};

diff --git a/arch/arm/mach-omap2/clockdomains_common_data.c b/arch/arm/mach-omap2/clockdomains_common_data.c
deleted file mode 100644
index 615b1f0..0000000
--- a/arch/arm/mach-omap2/clockdomains_common_data.c
+++ /dev/null
@@ -1,24 +0,0 @@
-/*
- * OMAP2+-common clockdomain data
- *
- * Copyright (C) 2008-2012 Texas Instruments, Inc.
- * Copyright (C) 2008-2010 Nokia Corporation
- *
- * Paul Walmsley, Jouni Högander
- */
-
-#include <linux/kernel.h>
-#include <linux/io.h>
-
-#include "clockdomain.h"
-
-/* These are implicit clockdomains - they are never defined as such in TRM */
-struct clockdomain prm_common_clkdm = {
- .name = "prm_clkdm",
- .pwrdm = { .name = "wkup_pwrdm" },
-};
-
-struct clockdomain cm_common_clkdm = {
- .name = "cm_clkdm",
- .pwrdm = { .name = "core_pwrdm" },
-};
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index bf86f7e..3bba881 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -1285,23 +1285,22 @@ static struct omap_hwmod *_lookup(const char *name)

return oh;
}
+
/**
* _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
* @oh: struct omap_hwmod *
*
* Convert a clockdomain name stored in a struct omap_hwmod into a
* clockdomain pointer, and save it into the struct omap_hwmod.
- * return -EINVAL if clkdm_name does not exist or if the lookup failed.
+ * Return -EINVAL if the clkdm_name lookup failed.
*/
static int _init_clkdm(struct omap_hwmod *oh)
{
if (cpu_is_omap24xx() || cpu_is_omap34xx())
return 0;

- if (!oh->clkdm_name) {
- pr_warning("omap_hwmod: %s: no clkdm_name\n", oh->name);
- return -EINVAL;
- }
+ if (!oh->clkdm_name)
+ return 0;

oh->clkdm = clkdm_lookup(oh->clkdm_name);
if (!oh->clkdm) {
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 950454a..e9e9ec0 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -2540,14 +2540,12 @@ static struct omap_hwmod omap44xx_prcm_mpu_hwmod = {
static struct omap_hwmod omap44xx_cm_core_aon_hwmod = {
.name = "cm_core_aon",
.class = &omap44xx_prcm_hwmod_class,
- .clkdm_name = "cm_clkdm",
};

/* cm_core */
static struct omap_hwmod omap44xx_cm_core_hwmod = {
.name = "cm_core",
.class = &omap44xx_prcm_hwmod_class,
- .clkdm_name = "cm_clkdm",
};

/* prm */
@@ -2564,7 +2562,6 @@ static struct omap_hwmod_rst_info omap44xx_prm_resets[] = {
static struct omap_hwmod omap44xx_prm_hwmod = {
.name = "prm",
.class = &omap44xx_prcm_hwmod_class,
- .clkdm_name = "prm_clkdm",
.mpu_irqs = omap44xx_prm_irqs,
.rst_lines = omap44xx_prm_resets,
.rst_lines_cnt = ARRAY_SIZE(omap44xx_prm_resets),
--
1.7.10
Benoit Cousson
2012-06-11 16:47:05 UTC
Permalink
This reverts commit 6ba5a69ee92c29c2ffc814dad6ac61c4cd49090c.

Conflicts:

arch/arm/mach-omap2/Makefile

Neither prm_clkdm nor cm_clkdm does exist on OMAP4.
Remove the common definition that does not make sense anymore
since it is not common for OMAP2+ platforms.

Please note that these clock domains are probably non existant
on OMAP 2 & 3 and thus should be removed in all the
clockdomain files.

Signed-off-by: Benoit Cousson <b-***@ti.com>
---
arch/arm/mach-omap2/Makefile | 1 -
arch/arm/mach-omap2/clockdomain44xx.c | 6 -----
arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c | 10 +++++++++
arch/arm/mach-omap2/clockdomains44xx_data.c | 2 -
arch/arm/mach-omap2/clockdomains_common_data.c | 24 ----------------------
5 files changed, 10 insertions(+), 33 deletions(-)
delete mode 100644 arch/arm/mach-omap2/clockdomains_common_data.c

diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index fa742f3..bc7d239 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -116,7 +116,6 @@ obj-$(CONFIG_ARCH_OMAP4) += powerdomains44xx_data.o

# PRCM clockdomain control
clockdomain-common += clockdomain.o
-clockdomain-common += clockdomains_common_data.o
obj-$(CONFIG_ARCH_OMAP2) += $(clockdomain-common)
obj-$(CONFIG_ARCH_OMAP2) += clockdomain2xxx_3xxx.o
obj-$(CONFIG_ARCH_OMAP2) += clockdomains2xxx_3xxx_data.o
diff --git a/arch/arm/mach-omap2/clockdomain44xx.c b/arch/arm/mach-omap2/clockdomain44xx.c
index 4f04dd1..935c7f0 100644
--- a/arch/arm/mach-omap2/clockdomain44xx.c
+++ b/arch/arm/mach-omap2/clockdomain44xx.c
@@ -51,9 +51,6 @@ static int omap4_clkdm_clear_all_wkup_sleep_deps(struct clockdomain *clkdm)
struct clkdm_dep *cd;
u32 mask = 0;

- if (!clkdm->prcm_partition)
- return 0;
-
for (cd = clkdm->wkdep_srcs; cd && cd->clkdm_name; cd++) {
if (!cd->clkdm)
continue; /* only happens if data is erroneous */
@@ -106,9 +103,6 @@ static int omap4_clkdm_clk_disable(struct clockdomain *clkdm)
{
bool hwsup = false;

- if (!clkdm->prcm_partition)
- return 0;
-
hwsup = omap4_cminst_is_clkdm_in_hwsup(clkdm->prcm_partition,
clkdm->cm_inst, clkdm->clkdm_offs);

diff --git a/arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c b/arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c
index 839145e..0a6a048 100644
--- a/arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c
+++ b/arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c
@@ -89,3 +89,13 @@ struct clockdomain wkup_common_clkdm = {
.pwrdm = { .name = "wkup_pwrdm" },
.dep_bit = OMAP_EN_WKUP_SHIFT,
};
+
+struct clockdomain prm_common_clkdm = {
+ .name = "prm_clkdm",
+ .pwrdm = { .name = "wkup_pwrdm" },
+};
+
+struct clockdomain cm_common_clkdm = {
+ .name = "cm_clkdm",
+ .pwrdm = { .name = "core_pwrdm" },
+};
diff --git a/arch/arm/mach-omap2/clockdomains44xx_data.c b/arch/arm/mach-omap2/clockdomains44xx_data.c
index c534258..bd7ed13 100644
--- a/arch/arm/mach-omap2/clockdomains44xx_data.c
+++ b/arch/arm/mach-omap2/clockdomains44xx_data.c
@@ -430,8 +430,6 @@ static struct clockdomain *clockdomains_omap44xx[] __initdata = {
&l4_wkup_44xx_clkdm,
&emu_sys_44xx_clkdm,
&l3_dma_44xx_clkdm,
- &prm_common_clkdm,
- &cm_common_clkdm,
NULL
};

diff --git a/arch/arm/mach-omap2/clockdomains_common_data.c b/arch/arm/mach-omap2/clockdomains_common_data.c
deleted file mode 100644
index 615b1f0..0000000
--- a/arch/arm/mach-omap2/clockdomains_common_data.c
+++ /dev/null
@@ -1,24 +0,0 @@
-/*
- * OMAP2+-common clockdomain data
- *
- * Copyright (C) 2008-2012 Texas Instruments, Inc.
- * Copyright (C) 2008-2010 Nokia Corporation
- *
- * Paul Walmsley, Jouni Högander
- */
-
-#include <linux/kernel.h>
-#include <linux/io.h>
-
-#include "clockdomain.h"
-
-/* These are implicit clockdomains - they are never defined as such in TRM */
-struct clockdomain prm_common_clkdm = {
- .name = "prm_clkdm",
- .pwrdm = { .name = "wkup_pwrdm" },
-};
-
-struct clockdomain cm_common_clkdm = {
- .name = "cm_clkdm",
- .pwrdm = { .name = "core_pwrdm" },
-};
--
1.7.0.4

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Paul Walmsley
2012-06-11 17:31:45 UTC
Permalink
Post by Benoit Cousson
Neither prm_clkdm nor cm_clkdm does exist on OMAP4.
Remove the common definition that does not make sense anymore
since it is not common for OMAP2+ platforms.
Please note that these clock domains are probably non existant
on OMAP 2 & 3 and thus should be removed in all the
clockdomain files.
For the archives:

http://marc.info/?l=linux-omap&m=133943578712129&w=2


- Paul
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