[PATCH 0/3] ARM: dts: NSP: dma-coherent and USB3 changes

[Jon Mason]

Add dma-coherent to the relevant DT entries, and add USB3 support

Jon Mason (3):
ARM: dts: NSP: Add dma-coherent to relevant DT entries
ARM: dts: NSP: Rearrage USB entries
ARM: dts: NSP: Add USB3 and USB3 PHY to NSP

arch/arm/boot/dts/bcm-nsp.dtsi | 61 +++++++++++++++++++++++++++++---------
arch/arm/boot/dts/bcm958522er.dts | 8 +++++
arch/arm/boot/dts/bcm958525er.dts | 8 +++++
arch/arm/boot/dts/bcm958525xmc.dts | 8 +++++
arch/arm/boot/dts/bcm958622hr.dts | 8 +++++
arch/arm/boot/dts/bcm958623hr.dts | 8 +++++
arch/arm/boot/dts/bcm958625hr.dts | 8 +++++
arch/arm/boot/dts/bcm958625k.dts | 8 +++++
8 files changed, 103 insertions(+), 14 deletions(-)

[Jon Mason]

Cache related issues with DMA rings and performance issues related to
caching are being caused by not properly setting the "dma-coherent" flag
in the device tree entries. Adding it here to correct the issue.

Signed-off-by: Jon Mason <***@broadcom.com>
Fixes: 5fa1026a3e4d ("ARM: dts: NSP: Add PL330 support")
Fixes: 3107fa5bcfb2 ("ARM: dts: NSP: Add SD/MMC support")
Fixes: 13d04f20935c ("ARM: dts: NSP: Add AMAC entries")
Fixes: 5aeda7bf8a1e ("ARM: dts: NSP: Add and enable amac2")
Fixes: 17d517172300 ("ARM: dts: NSP: Add mailbox (PDC) to NSP")
Fixes: 1d8ece6639e1 ("ARM: dts: NSP: Add EHCI/OHCI USB nodes to device tree")
Fixes: bf2289bedef4 ("ARM: dts: NSP: Add Switch Register Access Block node")
Fixes: 0f9f27a36d09 ("ARM: dts: NSP: Add I2C support to the DT")
Fixes: 8dbcad020f2e ("ARM: dts: nsp: Add sata device tree entry")
Fixes: 522199029fdc ("ARM: dts: NSP: Fix PCIE DT issue")
---
arch/arm/boot/dts/bcm-nsp.dtsi | 14 ++++++++++++++
1 file changed, 14 insertions(+)

diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi
index 7204d1def23d..c8d734d9f5fc 100644
--- a/arch/arm/boot/dts/bcm-nsp.dtsi
+++ b/arch/arm/boot/dts/bcm-nsp.dtsi
@@ -207,6 +207,7 @@
clocks = <&iprocslow>;
clock-names = "apb_pclk";
#dma-cells = <1>;
+ dma-coherent;
};

sdio: ***@21000 {
@@ -215,6 +216,7 @@
interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
sdhci,auto-cmd12;
clocks = <&lcpll0 BCM_NSP_LCPLL0_SDIO_CLK>;
+ dma-coherent;
status = "disabled";
};

@@ -224,6 +226,7 @@
<0x110000 0x1000>;
reg-names = "amac_base", "idm_base";
interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
+ dma-coherent;
status = "disabled";
};

@@ -233,6 +236,7 @@
<0x111000 0x1000>;
reg-names = "amac_base", "idm_base";
interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
+ dma-coherent;
status = "disabled";
};

@@ -242,6 +246,7 @@
<0x112000 0x1000>;
reg-names = "amac_base", "idm_base";
interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
+ dma-coherent;
status = "disabled";
};

@@ -252,6 +257,7 @@
#mbox-cells = <1>;
brcm,rx-status-len = <32>;
brcm,use-bcm-hdr;
+ dma-coherent;
};

nand: ***@26000 {
@@ -325,6 +331,7 @@
compatible = "generic-ehci";
reg = <0x2a000 0x100>;
interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
+ dma-coherent;
status = "disabled";
};

@@ -332,6 +339,7 @@
compatible = "generic-ohci";
reg = <0x2b000 0x100>;
interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
+ dma-coherent;
status = "disabled";
};

@@ -364,6 +372,7 @@
#address-cells = <1>;
#size-cells = <0>;

+ dma-coherent;
status = "disabled";

/* ports are defined in board DTS */
@@ -376,6 +385,7 @@
#size-cells = <0>;
interrupts = <GIC_SPI 89 IRQ_TYPE_NONE>;
clock-frequency = <100000>;
+ dma-coherent;
status = "disabled";
};

@@ -446,6 +456,7 @@
interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
+ dma-coherent;
status = "disabled";

sata0: sata-***@0 {
@@ -483,6 +494,7 @@
*/
ranges = <0x82000000 0 0x08000000 0x08000000 0 0x8000000>;

+ dma-coherent;
status = "disabled";

msi-parent = <&msi0>;
@@ -519,6 +531,7 @@
*/
ranges = <0x82000000 0 0x40000000 0x40000000 0 0x8000000>;

+ dma-coherent;
status = "disabled";

msi-parent = <&msi1>;
@@ -555,6 +568,7 @@
*/
ranges = <0x82000000 0 0x48000000 0x48000000 0 0x8000000>;

+ dma-coherent;
status = "disabled";

msi-parent = <&msi2>;

[Jon Mason]

The rest of the DTSI file is in incrementing addresses, but the USB
OHCI/ECHI entries are out of sequence. Move them to put them in the
proper place.

Signed-off-by: Jon Mason <***@broadcom.com>
---
arch/arm/boot/dts/bcm-nsp.dtsi | 32 ++++++++++++++++----------------
1 file changed, 16 insertions(+), 16 deletions(-)

diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi
index c8d734d9f5fc..770aa2e7970c 100644
--- a/arch/arm/boot/dts/bcm-nsp.dtsi
+++ b/arch/arm/boot/dts/bcm-nsp.dtsi
@@ -303,6 +303,22 @@
#size-cells = <0>;
};

+ ehci0: ***@2a000 {
+ compatible = "generic-ehci";
+ reg = <0x2a000 0x100>;
+ interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
+ dma-coherent;
+ status = "disabled";
+ };
+
+ ohci0: ***@2b000 {
+ compatible = "generic-ohci";
+ reg = <0x2b000 0x100>;
+ interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
+ dma-coherent;
+ status = "disabled";
+ };
+
***@2f000 {
compatible = "brcm,spum-nsp-crypto";
reg = <0x2f000 0x900>;
@@ -327,22 +343,6 @@
status = "disabled";
};

- ehci0: ***@2a000 {
- compatible = "generic-ehci";
- reg = <0x2a000 0x100>;
- interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
- dma-coherent;
- status = "disabled";
- };
-
- ohci0: ***@2b000 {
- compatible = "generic-ohci";
- reg = <0x2b000 0x100>;
- interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
- dma-coherent;
- status = "disabled";
- };
-
rng: ***@33000 {
compatible = "brcm,bcm-nsp-rng";
reg = <0x33000 0x14>;

[Jon Mason]

This uses the existing Northstar USB3 PHY driver to enable the USB3
ports on NSP.

Signed-off-by: Jon Mason <***@broadcom.com>
---
arch/arm/boot/dts/bcm-nsp.dtsi | 19 +++++++++++++++++++
arch/arm/boot/dts/bcm958522er.dts | 8 ++++++++
arch/arm/boot/dts/bcm958525er.dts | 8 ++++++++
arch/arm/boot/dts/bcm958525xmc.dts | 8 ++++++++
arch/arm/boot/dts/bcm958622hr.dts | 8 ++++++++
arch/arm/boot/dts/bcm958623hr.dts | 8 ++++++++
arch/arm/boot/dts/bcm958625hr.dts | 8 ++++++++
arch/arm/boot/dts/bcm958625k.dts | 8 ++++++++
8 files changed, 75 insertions(+)

diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi
index 770aa2e7970c..8ba53b834cc8 100644
--- a/arch/arm/boot/dts/bcm-nsp.dtsi
+++ b/arch/arm/boot/dts/bcm-nsp.dtsi
@@ -303,6 +303,16 @@
#size-cells = <0>;
};

+ xhci: ***@29000 {
+ compatible = "generic-xhci";
+ reg = <0x29000 0x1000>;
+ interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
+ phys = <&usb3_phy>;
+ phy-names = "usb3-phy";
+ dma-coherent;
+ status = "disabled";
+ };
+
ehci0: ***@2a000 {
compatible = "generic-ehci";
reg = <0x2a000 0x100>;
@@ -471,6 +481,15 @@
phy-names = "sata-phy";
};
};
+
+ usb3_phy: usb3-***@104000 {
+ compatible = "brcm,ns-bx-usb3-phy";
+ reg = <0x104000 0x1000>,
+ <0x032000 0x1000>;
+ reg-names = "dmp", "ccb-mii";
+ #phy-cells = <0>;
+ status = "disabled";
+ };
};

pcie0: ***@18012000 {
diff --git a/arch/arm/boot/dts/bcm958522er.dts b/arch/arm/boot/dts/bcm958522er.dts
index f5c42962c201..f9dd342cc2ae 100644
--- a/arch/arm/boot/dts/bcm958522er.dts
+++ b/arch/arm/boot/dts/bcm958522er.dts
@@ -170,3 +170,11 @@
&uart0 {
status = "okay";
};
+
+&usb3_phy {
+ status = "okay";
+};
+
+&xhci {
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/bcm958525er.dts b/arch/arm/boot/dts/bcm958525er.dts
index efcb1f67bdad..374508a9cfbf 100644
--- a/arch/arm/boot/dts/bcm958525er.dts
+++ b/arch/arm/boot/dts/bcm958525er.dts
@@ -182,3 +182,11 @@
&uart0 {
status = "okay";
};
+
+&usb3_phy {
+ status = "okay";
+};
+
+&xhci {
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/bcm958525xmc.dts b/arch/arm/boot/dts/bcm958525xmc.dts
index b335ce02e32f..403250c5ad8e 100644
--- a/arch/arm/boot/dts/bcm958525xmc.dts
+++ b/arch/arm/boot/dts/bcm958525xmc.dts
@@ -202,3 +202,11 @@
&uart0 {
status = "okay";
};
+
+&usb3_phy {
+ status = "okay";
+};
+
+&xhci {
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/bcm958622hr.dts b/arch/arm/boot/dts/bcm958622hr.dts
index 16ab2d82a14b..fd8b8c689ffe 100644
--- a/arch/arm/boot/dts/bcm958622hr.dts
+++ b/arch/arm/boot/dts/bcm958622hr.dts
@@ -219,3 +219,11 @@
&uart0 {
status = "okay";
};
+
+&usb3_phy {
+ status = "okay";
+};
+
+&xhci {
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/bcm958623hr.dts b/arch/arm/boot/dts/bcm958623hr.dts
index 9b921c6aa8f8..3bc50849d013 100644
--- a/arch/arm/boot/dts/bcm958623hr.dts
+++ b/arch/arm/boot/dts/bcm958623hr.dts
@@ -227,3 +227,11 @@
&uart0 {
status = "okay";
};
+
+&usb3_phy {
+ status = "okay";
+};
+
+&xhci {
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/bcm958625hr.dts b/arch/arm/boot/dts/bcm958625hr.dts
index 006b08e41a3b..d94d14b3c745 100644
--- a/arch/arm/boot/dts/bcm958625hr.dts
+++ b/arch/arm/boot/dts/bcm958625hr.dts
@@ -229,3 +229,11 @@
&uart0 {
status = "okay";
};
+
+&usb3_phy {
+ status = "okay";
+};
+
+&xhci {
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/bcm958625k.dts b/arch/arm/boot/dts/bcm958625k.dts
index 64740f85cf4c..2cf2392483b2 100644
--- a/arch/arm/boot/dts/bcm958625k.dts
+++ b/arch/arm/boot/dts/bcm958625k.dts
@@ -264,3 +264,11 @@
&uart1 {
status = "okay";
};
+
+&usb3_phy {
+ status = "okay";
+};
+
+&xhci {
+ status = "okay";
+};