[PATCH 0/4] ARM: sun7i: Enable the I2C support for the A20

[Maxime Ripard]

Hi everyone,

This patchset enables the support for the I2C IP found in the Allwinner A20.
Since it's basically the same IP than the one found in the other Allwinner
SoCs, it's just a matter of enabling it in the device tree.

Thanks,
Maxime

Maxime Ripard (4):
ARM: sun7i: Enable the I2C controllers
ARM: sun7i: Add the pin muxing options for the I2C controllers
ARM: sun7i: cubieboard2: Enable the I2C controllers
ARM: sun7i: olinuxino-micro: Enable the I2C controllers

arch/arm/boot/dts/sun7i-a20-cubieboard2.dts | 12 +++++
arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts | 18 +++++++
arch/arm/boot/dts/sun7i-a20.dtsi | 66 +++++++++++++++++++++++++
3 files changed, 96 insertions(+)

[Maxime Ripard]

The Allwinner A20 shares the same I2C controller than the one that could
be found on earlier SoCs from Allwinner. There is only a few more of
these controllers. Add all of them in the DTSI.

Signed-off-by: Maxime Ripard <***@free-electrons.com>
---
arch/arm/boot/dts/sun7i-a20.dtsi | 45 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 45 insertions(+)

diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index 80559cb..82b1af3 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -324,6 +324,51 @@
status = "disabled";
};

+ i2c0: ***@01c2ac00 {
+ compatible = "allwinner,sun4i-i2c";
+ reg = <0x01c2ac00 0x400>;
+ interrupts = <0 7 1>;
+ clocks = <&apb1_gates 0>;
+ clock-frequency = <100000>;
+ status = "disabled";
+ };
+
+ i2c1: ***@01c2b000 {
+ compatible = "allwinner,sun4i-i2c";
+ reg = <0x01c2b000 0x400>;
+ interrupts = <0 8 1>;
+ clocks = <&apb1_gates 1>;
+ clock-frequency = <100000>;
+ status = "disabled";
+ };
+
+ i2c2: ***@01c2b400 {
+ compatible = "allwinner,sun4i-i2c";
+ reg = <0x01c2b400 0x400>;
+ interrupts = <0 9 1>;
+ clocks = <&apb1_gates 2>;
+ clock-frequency = <100000>;
+ status = "disabled";
+ };
+
+ i2c3: ***@01c2b800 {
+ compatible = "allwinner,sun4i-i2c";
+ reg = <0x01c2b800 0x400>;
+ interrupts = <0 88 1>;
+ clocks = <&apb1_gates 3>;
+ clock-frequency = <100000>;
+ status = "disabled";
+ };
+
+ i2c4: ***@01c2bc00 {
+ compatible = "allwinner,sun4i-i2c";
+ reg = <0x01c2bc00 0x400>;
+ interrupts = <0 89 1>;
+ clocks = <&apb1_gates 15>;
+ clock-frequency = <100000>;
+ status = "disabled";
+ };
+
gic: interrupt-***@01c81000 {
compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
reg = <0x01c81000 0x1000>,

[Maxime Ripard]

The A20-olinuxino-micro uses the first three I2C controllers found on
the A20. Enable them in the DT.

Signed-off-by: Maxime Ripard <***@free-electrons.com>
---
arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)

diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
index 9e77855..ead3013 100644
--- a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
+++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
@@ -60,6 +60,24 @@
pinctrl-0 = <&uart7_pins_a>;
status = "okay";
};
+
+ i2c0: ***@01c2ac00 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_pins_a>;
+ status = "okay";
+ };
+
+ i2c1: ***@01c2b000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_pins_a>;
+ status = "okay";
+ };
+
+ i2c2: ***@01c2b400 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c2_pins_a>;
+ status = "okay";
+ };
};

leds {

[Maxime Ripard]

The Cubieboard2 uses both the i2c0 and i2c1 controllers. Enable them in
the DT.

Signed-off-by: Maxime Ripard <***@free-electrons.com>
---
arch/arm/boot/dts/sun7i-a20-cubieboard2.dts | 12 ++++++++++++
1 file changed, 12 insertions(+)

diff --git a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts
index 15e625e..5c51cb8 100644
--- a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts
+++ b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts
@@ -48,6 +48,18 @@
pinctrl-0 = <&uart0_pins_a>;
status = "okay";
};
+
+ i2c0: ***@01c2ac00 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_pins_a>;
+ status = "okay";
+ };
+
+ i2c1: ***@01c2b000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_pins_a>;
+ status = "okay";
+ };
};

leds {

[Maxime Ripard]

The A20 boards we currently have share the same pins for the i2c
controllers they share. Add them to the DTSI.

Signed-off-by: Maxime Ripard <***@free-electrons.com>
---
arch/arm/boot/dts/sun7i-a20.dtsi | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)

diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index 82b1af3..b939d30 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -215,6 +215,27 @@
allwinner,pull = <0>;
};

+ i2c0_pins_a: ***@0 {
+ allwinner,pins = "PB0", "PB1";
+ allwinner,function = "i2c0";
+ allwinner,drive = <0>;
+ allwinner,pull = <0>;
+ };
+
+ i2c1_pins_a: ***@0 {
+ allwinner,pins = "PB18", "PB19";
+ allwinner,function = "i2c1";
+ allwinner,drive = <0>;
+ allwinner,pull = <0>;
+ };
+
+ i2c2_pins_a: ***@0 {
+ allwinner,pins = "PB20", "PB21";
+ allwinner,function = "i2c2";
+ allwinner,drive = <0>;
+ allwinner,pull = <0>;
+ };
+
emac_pins_a: ***@0 {
allwinner,pins = "PA0", "PA1", "PA2",
"PA3", "PA4", "PA5", "PA6",

[Maxime Ripard]

Post by Maxime Ripard
Hi everyone,
This patchset enables the support for the I2C IP found in the Allwinner A20.
Since it's basically the same IP than the one found in the other Allwinner
SoCs, it's just a matter of enabling it in the device tree.

Merged into sunxi/dt-for-3.13

Maxime