Discussion:
[PATCH 0/2] Enable NAND support on Armada 7K/8K
Gregory CLEMENT
2017-07-19 15:31:24 UTC
Permalink
Hi Boris,

this short series enables the NAND controller on the Armada 7K/8K
SoCs. The IP used is the same that the other mvebu SoC, so we only
need to be bale to build it for this SoCs and updating the device
tree.

The first patch should go to mtd and the second one to arm-soc through
mvebu.

The patches are completely independent.

Thanks,

Gregory

Gregory CLEMENT (2):
mtd: nand: pxa3xx_nand: enable building on mvebu 64-bit platforms
ARM64: dts: marvell: add NAND support on the CP110 master

arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi | 14 ++++++++++++++
drivers/mtd/nand/Kconfig | 2 +-
2 files changed, 15 insertions(+), 1 deletion(-)
--
2.13.2
Gregory CLEMENT
2017-07-19 15:31:25 UTC
Permalink
The controller supported by the pxa3xx_nand driver is also available on
the mvebu 64-bit SoCs, such as the Armada 7K and Armada 8K SoCs. This
patch updates the Kconfig dependency to allow building the kernel for
this SoC family too.

Signed-off-by: Gregory CLEMENT <***@free-electrons.com>
---
drivers/mtd/nand/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index dbfa72d61d5a..ca42503e42f7 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -315,7 +315,7 @@ config MTD_NAND_ATMEL

config MTD_NAND_PXA3xx
tristate "NAND support on PXA3xx and Armada 370/XP"
- depends on PXA3xx || ARCH_MMP || PLAT_ORION
+ depends on PXA3xx || ARCH_MMP || PLAT_ORION || ARCH_MVEBU
help
This enables the driver for the NAND flash device found on
PXA3xx processors (NFCv1) and also on Armada 370/XP (NFCv2).
--
2.13.2
Thomas Petazzoni
2017-07-19 15:40:06 UTC
Permalink
Hello,
Post by Gregory CLEMENT
config MTD_NAND_PXA3xx
tristate "NAND support on PXA3xx and Armada 370/XP"
- depends on PXA3xx || ARCH_MMP || PLAT_ORION
+ depends on PXA3xx || ARCH_MMP || PLAT_ORION || ARCH_MVEBU
^^^

Stupid minor nit: there are two spaces here, there should be one. No
need to send a v2 just for this, I'm sure Boris will happily fix this
when applying :-)

Best regards,

Thomas
--
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
Gregory CLEMENT
2017-07-19 15:31:26 UTC
Permalink
The NAND controller used in A7K/A8K is present on the CP110 master
part. It is compatible with the pxa-nand driver.

Unlike most of the controller on the CP110 this one is only present on
the master for the Armada 8K SoCs.

Signed-off-by: Gregory CLEMENT <***@free-electrons.com>
---
arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi | 14 ++++++++++++++
1 file changed, 14 insertions(+)

diff --git a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi
index 726528ce54e9..9be4a442ded5 100644
--- a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi
@@ -240,6 +240,20 @@
status = "disabled";
};

+ cpm_nand: ***@720000 {
+ /*
+ * For A7K/A8K this controller is only
+ * present on the CPM and not on the CPS
+ */
+ compatible = "marvell,armada370-nand";
+ reg = <0x720000 0x54>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ interrupts = <ICU_GRP_NSR 115 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpm_clk 1 2>;
+ status = "disabled";
+ };
+
cpm_trng: ***@760000 {
compatible = "marvell,armada-8k-rng", "inside-secure,safexcel-eip76";
reg = <0x760000 0x7d>;
--
2.13.2
Gregory CLEMENT
2017-07-24 15:19:59 UTC
Permalink
Hi,
Post by Gregory CLEMENT
The NAND controller used in A7K/A8K is present on the CP110 master
part. It is compatible with the pxa-nand driver.
Unlike most of the controller on the CP110 this one is only present on
the master for the Armada 8K SoCs.
Actually this is wrong. The controller is present on both CP, but
because of the muxing only the one present on the CPS is available on
the Armada 8K.

I will send a new version fixing it.

Gregory
Post by Gregory CLEMENT
---
arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi
index 726528ce54e9..9be4a442ded5 100644
--- a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi
@@ -240,6 +240,20 @@
status = "disabled";
};
+ /*
+ * For A7K/A8K this controller is only
+ * present on the CPM and not on the CPS
+ */
+ compatible = "marvell,armada370-nand";
+ reg = <0x720000 0x54>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ interrupts = <ICU_GRP_NSR 115 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpm_clk 1 2>;
+ status = "disabled";
+ };
+
compatible = "marvell,armada-8k-rng", "inside-secure,safexcel-eip76";
reg = <0x760000 0x7d>;
--
2.13.2
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
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